phy: uniphier-usb3ss: fix unintended writing zeros to PHY register
Similar to commit4a90bbb478
("phy: uniphier-pcie: Fix updating phy parameters"), in function uniphier_u3ssphy_set_param(), unintentionally write zeros to other fields when writing PHY registers. Fixes:5ab43d0f86
("phy: socionext: add USB3 PHY driver for UniPhier SoC") Signed-off-by: Ryuta NAKANISHI <nakanishi.ryuta@socionext.com> Signed-off-by: Kunihiko Hayashi <hayashi.kunihiko@socionext.com> Link: https://lore.kernel.org/r/1640150369-4134-1-git-send-email-hayashi.kunihiko@socionext.com Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -22,11 +22,13 @@
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#include <linux/reset.h>
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#define SSPHY_TESTI 0x0
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#define SSPHY_TESTO 0x4
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#define TESTI_DAT_MASK GENMASK(13, 6)
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#define TESTI_ADR_MASK GENMASK(5, 1)
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#define TESTI_WR_EN BIT(0)
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#define SSPHY_TESTO 0x4
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#define TESTO_DAT_MASK GENMASK(7, 0)
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#define PHY_F(regno, msb, lsb) { (regno), (msb), (lsb) }
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#define CDR_CPD_TRIM PHY_F(7, 3, 0) /* RxPLL charge pump current */
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@ -84,12 +86,12 @@ static void uniphier_u3ssphy_set_param(struct uniphier_u3ssphy_priv *priv,
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val = FIELD_PREP(TESTI_DAT_MASK, 1);
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val |= FIELD_PREP(TESTI_ADR_MASK, p->field.reg_no);
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uniphier_u3ssphy_testio_write(priv, val);
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val = readl(priv->base + SSPHY_TESTO);
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val = readl(priv->base + SSPHY_TESTO) & TESTO_DAT_MASK;
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/* update value */
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val &= ~FIELD_PREP(TESTI_DAT_MASK, field_mask);
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val &= ~field_mask;
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data = field_mask & (p->value << p->field.lsb);
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val = FIELD_PREP(TESTI_DAT_MASK, data);
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val = FIELD_PREP(TESTI_DAT_MASK, data | val);
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val |= FIELD_PREP(TESTI_ADR_MASK, p->field.reg_no);
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uniphier_u3ssphy_testio_write(priv, val);
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uniphier_u3ssphy_testio_write(priv, val | TESTI_WR_EN);
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