scsi: hisi_sas: Drop hisi_sas_hw.get_free_slot
In commit 1273d65f29
("scsi: hisi_sas: change queue depth from 512 to
4096"), the depth of each queue is the same as the max IPTT in the system.
As such, as long as we have an IPTT allocated, we will have enough space on
any delivery queue.
All .get_free_slot functions were checking for space on the queue by
reading the DQ read pointer. Drop this, and also raise the code into common
code, as there is nothing hw specific remaining.
Signed-off-by: John Garry <john.garry@huawei.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
This commit is contained in:
parent
93352abc81
commit
897cc769bc
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@ -260,7 +260,6 @@ struct hisi_sas_hw {
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struct domain_device *device);
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struct hisi_sas_device *(*alloc_dev)(struct domain_device *device);
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void (*sl_notify_ssp)(struct hisi_hba *hisi_hba, int phy_no);
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int (*get_free_slot)(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq);
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void (*start_delivery)(struct hisi_sas_dq *dq);
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void (*prep_ssp)(struct hisi_hba *hisi_hba,
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struct hisi_sas_slot *slot);
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@ -519,13 +519,8 @@ static int hisi_sas_task_prep(struct sas_task *task,
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slot = &hisi_hba->slot_info[slot_idx];
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spin_lock_irqsave(&dq->lock, flags);
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wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
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if (wr_q_index < 0) {
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spin_unlock_irqrestore(&dq->lock, flags);
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rc = -EAGAIN;
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goto err_out_tag;
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}
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wr_q_index = dq->wr_point;
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dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
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list_add_tail(&slot->delivery, &dq->list);
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spin_unlock_irqrestore(&dq->lock, flags);
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spin_lock_irqsave(&sas_dev->lock, flags);
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@ -579,8 +574,6 @@ static int hisi_sas_task_prep(struct sas_task *task,
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return 0;
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err_out_tag:
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hisi_sas_slot_index_free(hisi_hba, slot_idx);
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err_out_dif_dma_unmap:
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if (!sas_protocol_ata(task->task_proto))
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hisi_sas_dif_dma_unmap(hisi_hba, task, n_elem_dif);
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@ -1963,7 +1956,7 @@ hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
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struct asd_sas_port *sas_port = device->port;
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struct hisi_sas_cmd_hdr *cmd_hdr_base;
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int dlvry_queue_slot, dlvry_queue, n_elem = 0, rc, slot_idx;
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unsigned long flags, flags_dq = 0;
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unsigned long flags;
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int wr_q_index;
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if (unlikely(test_bit(HISI_SAS_REJECT_CMD_BIT, &hisi_hba->flags)))
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@ -1982,15 +1975,11 @@ hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
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slot_idx = rc;
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slot = &hisi_hba->slot_info[slot_idx];
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spin_lock_irqsave(&dq->lock, flags_dq);
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wr_q_index = hisi_hba->hw->get_free_slot(hisi_hba, dq);
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if (wr_q_index < 0) {
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spin_unlock_irqrestore(&dq->lock, flags_dq);
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rc = -EAGAIN;
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goto err_out_tag;
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}
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spin_lock_irqsave(&dq->lock, flags);
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wr_q_index = dq->wr_point;
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dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
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list_add_tail(&slot->delivery, &dq->list);
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spin_unlock_irqrestore(&dq->lock, flags_dq);
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spin_unlock_irqrestore(&dq->lock, flags);
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spin_lock_irqsave(&sas_dev->lock, flags);
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list_add_tail(&slot->entry, &sas_dev->list);
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spin_unlock_irqrestore(&sas_dev->lock, flags);
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@ -2027,8 +2016,6 @@ hisi_sas_internal_abort_task_exec(struct hisi_hba *hisi_hba, int device_id,
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return 0;
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err_out_tag:
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hisi_sas_slot_index_free(hisi_hba, slot_idx);
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err_out:
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dev_err(dev, "internal abort task prep: failed[%d]!\n", rc);
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@ -416,13 +416,6 @@ static u32 hisi_sas_read32(struct hisi_hba *hisi_hba, u32 off)
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return readl(regs);
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}
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static u32 hisi_sas_read32_relaxed(struct hisi_hba *hisi_hba, u32 off)
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{
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void __iomem *regs = hisi_hba->regs + off;
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return readl_relaxed(regs);
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}
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static void hisi_sas_write32(struct hisi_hba *hisi_hba,
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u32 off, u32 val)
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{
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@ -864,30 +857,6 @@ static int get_wideport_bitmap_v1_hw(struct hisi_hba *hisi_hba, int port_id)
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return bitmap;
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}
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/*
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* The callpath to this function and upto writing the write
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* queue pointer should be safe from interruption.
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*/
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static int
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get_free_slot_v1_hw(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq)
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{
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struct device *dev = hisi_hba->dev;
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int queue = dq->id;
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u32 r, w;
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w = dq->wr_point;
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r = hisi_sas_read32_relaxed(hisi_hba,
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DLVRY_Q_0_RD_PTR + (queue * 0x14));
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if (r == (w+1) % HISI_SAS_QUEUE_SLOTS) {
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dev_warn(dev, "could not find free slot\n");
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return -EAGAIN;
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}
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dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
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return w;
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}
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/* DQ lock must be taken here */
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static void start_delivery_v1_hw(struct hisi_sas_dq *dq)
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{
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@ -1818,7 +1787,6 @@ static const struct hisi_sas_hw hisi_sas_v1_hw = {
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.clear_itct = clear_itct_v1_hw,
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.prep_smp = prep_smp_v1_hw,
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.prep_ssp = prep_ssp_v1_hw,
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.get_free_slot = get_free_slot_v1_hw,
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.start_delivery = start_delivery_v1_hw,
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.slot_complete = slot_complete_v1_hw,
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.phys_init = phys_init_v1_hw,
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@ -1637,31 +1637,6 @@ static int get_wideport_bitmap_v2_hw(struct hisi_hba *hisi_hba, int port_id)
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return bitmap;
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}
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/*
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* The callpath to this function and upto writing the write
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* queue pointer should be safe from interruption.
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*/
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static int
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get_free_slot_v2_hw(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq)
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{
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struct device *dev = hisi_hba->dev;
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int queue = dq->id;
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u32 r, w;
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w = dq->wr_point;
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r = hisi_sas_read32_relaxed(hisi_hba,
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DLVRY_Q_0_RD_PTR + (queue * 0x14));
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if (r == (w+1) % HISI_SAS_QUEUE_SLOTS) {
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dev_warn(dev, "full queue=%d r=%d w=%d\n",
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queue, r, w);
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return -EAGAIN;
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}
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dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
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return w;
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}
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/* DQ lock must be taken here */
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static void start_delivery_v2_hw(struct hisi_sas_dq *dq)
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{
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@ -3606,7 +3581,6 @@ static const struct hisi_sas_hw hisi_sas_v2_hw = {
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.prep_ssp = prep_ssp_v2_hw,
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.prep_stp = prep_ata_v2_hw,
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.prep_abort = prep_abort_v2_hw,
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.get_free_slot = get_free_slot_v2_hw,
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.start_delivery = start_delivery_v2_hw,
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.slot_complete = slot_complete_v2_hw,
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.phys_init = phys_init_v2_hw,
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@ -499,13 +499,6 @@ static u32 hisi_sas_read32(struct hisi_hba *hisi_hba, u32 off)
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return readl(regs);
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}
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static u32 hisi_sas_read32_relaxed(struct hisi_hba *hisi_hba, u32 off)
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{
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void __iomem *regs = hisi_hba->regs + off;
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return readl_relaxed(regs);
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}
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static void hisi_sas_write32(struct hisi_hba *hisi_hba, u32 off, u32 val)
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{
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void __iomem *regs = hisi_hba->regs + off;
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@ -1006,31 +999,6 @@ static int get_wideport_bitmap_v3_hw(struct hisi_hba *hisi_hba, int port_id)
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return bitmap;
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}
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/**
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* The callpath to this function and upto writing the write
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* queue pointer should be safe from interruption.
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*/
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static int
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get_free_slot_v3_hw(struct hisi_hba *hisi_hba, struct hisi_sas_dq *dq)
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{
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struct device *dev = hisi_hba->dev;
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int queue = dq->id;
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u32 r, w;
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w = dq->wr_point;
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r = hisi_sas_read32_relaxed(hisi_hba,
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DLVRY_Q_0_RD_PTR + (queue * 0x14));
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if (r == (w+1) % HISI_SAS_QUEUE_SLOTS) {
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dev_warn(dev, "full queue=%d r=%d w=%d\n",
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queue, r, w);
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return -EAGAIN;
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}
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dq->wr_point = (dq->wr_point + 1) % HISI_SAS_QUEUE_SLOTS;
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return w;
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}
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static void start_delivery_v3_hw(struct hisi_sas_dq *dq)
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{
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struct hisi_hba *hisi_hba = dq->hisi_hba;
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@ -2943,7 +2911,6 @@ static const struct hisi_sas_hw hisi_sas_v3_hw = {
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.prep_smp = prep_smp_v3_hw,
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.prep_stp = prep_ata_v3_hw,
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.prep_abort = prep_abort_v3_hw,
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.get_free_slot = get_free_slot_v3_hw,
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.start_delivery = start_delivery_v3_hw,
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.slot_complete = slot_complete_v3_hw,
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.phys_init = phys_init_v3_hw,
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