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ASoC: fsl_esai: ETDR and TX0~5 registers are non volatile 

ETDR and TX0~5 registers are writable and not readable. So they are non
volatile. Remove them from volatile list, and add default register value for
them.

Signed-off-by: Zidan Wang <zidan.wang@freescale.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Zidan Wang 2015-10-26 15:19:02 +08:00 committed by Mark Brown
parent 8005c49d9a
commit 8973112aa4
1 changed files with 22 additions and 22 deletions
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44
sound/soc/fsl/fsl_esai.c
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@ -653,21 +653,28 @@ static const struct snd_soc_component_driver fsl_esai_component = {
};
static const struct reg_default fsl_esai_reg_defaults[] = {
{0x8, 0x00000000},
{0x10, 0x00000000},
{0x18, 0x00000000},
{0x98, 0x00000000},
{0xd0, 0x00000000},
{0xd4, 0x00000000},
{0xd8, 0x00000000},
{0xdc, 0x00000000},
{0xe0, 0x00000000},
{0xe4, 0x0000ffff},
{0xe8, 0x0000ffff},
{0xec, 0x0000ffff},
{0xf0, 0x0000ffff},
{0xf8, 0x00000000},
{0xfc, 0x00000000},
{REG_ESAI_ETDR, 0x00000000},
{REG_ESAI_ECR, 0x00000000},
{REG_ESAI_TFCR, 0x00000000},
{REG_ESAI_RFCR, 0x00000000},
{REG_ESAI_TX0, 0x00000000},
{REG_ESAI_TX1, 0x00000000},
{REG_ESAI_TX2, 0x00000000},
{REG_ESAI_TX3, 0x00000000},
{REG_ESAI_TX4, 0x00000000},
{REG_ESAI_TX5, 0x00000000},
{REG_ESAI_TSR, 0x00000000},
{REG_ESAI_SAICR, 0x00000000},
{REG_ESAI_TCR, 0x00000000},
{REG_ESAI_TCCR, 0x00000000},
{REG_ESAI_RCR, 0x00000000},
{REG_ESAI_RCCR, 0x00000000},
{REG_ESAI_TSMA, 0x0000ffff},
{REG_ESAI_TSMB, 0x0000ffff},
{REG_ESAI_RSMA, 0x0000ffff},
{REG_ESAI_RSMB, 0x0000ffff},
{REG_ESAI_PRRC, 0x00000000},
{REG_ESAI_PCRC, 0x00000000},
};
static bool fsl_esai_readable_reg(struct device *dev, unsigned int reg)
@ -705,17 +712,10 @@ static bool fsl_esai_readable_reg(struct device *dev, unsigned int reg)
static bool fsl_esai_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case REG_ESAI_ETDR:
case REG_ESAI_ERDR:
case REG_ESAI_ESR:
case REG_ESAI_TFSR:
case REG_ESAI_RFSR:
case REG_ESAI_TX0:
case REG_ESAI_TX1:
case REG_ESAI_TX2:
case REG_ESAI_TX3:
case REG_ESAI_TX4:
case REG_ESAI_TX5:
case REG_ESAI_RX0:
case REG_ESAI_RX1:
case REG_ESAI_RX2: