powerpc: inline iomap accessors
ioreadXX()/ioreadXXbe() accessors are equivalent to ppc
in_leXX()/in_be16() accessors but they are not inlined.
Since commit 0eb5736828 ("powerpc/kerenl: Enable EEH for IO
accessors"), the 'le' versions are equivalent to the ones
defined in asm-generic/io.h, allthough the ones there are inlined.
Include asm-generic/io.h to get them. Keep ppc versions of the
'be' ones as they are optimised, but make them inline in ppc io.h.
This reduces the size of ppc64e_defconfig build by 3 kbytes:
text data bss dec hex filename
10160733 4343422 562972 15067127 e5e7f7 vmlinux.before
10159239 4341590 562972 15063801 e5daf9 vmlinux.after
A typical function using ioread and iowrite before the change:
c00000000066a3c4 <.ata_bmdma_stop>:
c00000000066a3c4: 7c 08 02 a6 mflr r0
c00000000066a3c8: fb c1 ff f0 std r30,-16(r1)
c00000000066a3cc: f8 01 00 10 std r0,16(r1)
c00000000066a3d0: fb e1 ff f8 std r31,-8(r1)
c00000000066a3d4: f8 21 ff 81 stdu r1,-128(r1)
c00000000066a3d8: eb e3 00 00 ld r31,0(r3)
c00000000066a3dc: eb df 00 98 ld r30,152(r31)
c00000000066a3e0: 7f c3 f3 78 mr r3,r30
c00000000066a3e4: 4b 9b 6f 7d bl c000000000021360 <.ioread8>
c00000000066a3e8: 60 00 00 00 nop
c00000000066a3ec: 7f c4 f3 78 mr r4,r30
c00000000066a3f0: 54 63 06 3c rlwinm r3,r3,0,24,30
c00000000066a3f4: 4b 9b 70 4d bl c000000000021440 <.iowrite8>
c00000000066a3f8: 60 00 00 00 nop
c00000000066a3fc: 7f e3 fb 78 mr r3,r31
c00000000066a400: 38 21 00 80 addi r1,r1,128
c00000000066a404: e8 01 00 10 ld r0,16(r1)
c00000000066a408: eb c1 ff f0 ld r30,-16(r1)
c00000000066a40c: 7c 08 03 a6 mtlr r0
c00000000066a410: eb e1 ff f8 ld r31,-8(r1)
c00000000066a414: 4b ff ff 8c b c00000000066a3a0 <.ata_sff_dma_pause>
The same function with this patch:
c000000000669cb4 <.ata_bmdma_stop>:
c000000000669cb4: e8 63 00 00 ld r3,0(r3)
c000000000669cb8: e9 43 00 98 ld r10,152(r3)
c000000000669cbc: 7c 00 04 ac hwsync
c000000000669cc0: 89 2a 00 00 lbz r9,0(r10)
c000000000669cc4: 0c 09 00 00 twi 0,r9,0
c000000000669cc8: 4c 00 01 2c isync
c000000000669ccc: 55 29 06 3c rlwinm r9,r9,0,24,30
c000000000669cd0: 7c 00 04 ac hwsync
c000000000669cd4: 99 2a 00 00 stb r9,0(r10)
c000000000669cd8: a1 4d 06 f0 lhz r10,1776(r13)
c000000000669cdc: 2c 2a 00 00 cmpdi r10,0
c000000000669ce0: 41 c2 00 08 beq- c000000000669ce8 <.ata_bmdma_stop+0x34>
c000000000669ce4: b1 4d 06 f2 sth r10,1778(r13)
c000000000669ce8: 4b ff ff a8 b c000000000669c90 <.ata_sff_dma_pause>
Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Link: https://lore.kernel.org/r/18b357d68c4cde149f75c7a1031c850925cd8128.1605981539.git.christophe.leroy@csgroup.eu
This commit is contained in:
Christophe Leroy
Michael Ellerman
parent
f75e7d73bd
commit
894fa235eb
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@ -302,41 +302,56 @@ static inline unsigned char __raw_readb(const volatile void __iomem *addr)
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{
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return *(volatile unsigned char __force *)PCI_FIX_ADDR(addr);
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}
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#define __raw_readb __raw_readb
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static inline unsigned short __raw_readw(const volatile void __iomem *addr)
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{
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return *(volatile unsigned short __force *)PCI_FIX_ADDR(addr);
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}
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#define __raw_readw __raw_readw
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static inline unsigned int __raw_readl(const volatile void __iomem *addr)
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{
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return *(volatile unsigned int __force *)PCI_FIX_ADDR(addr);
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}
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#define __raw_readl __raw_readl
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static inline void __raw_writeb(unsigned char v, volatile void __iomem *addr)
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{
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*(volatile unsigned char __force *)PCI_FIX_ADDR(addr) = v;
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}
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#define __raw_writeb __raw_writeb
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static inline void __raw_writew(unsigned short v, volatile void __iomem *addr)
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{
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*(volatile unsigned short __force *)PCI_FIX_ADDR(addr) = v;
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}
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#define __raw_writew __raw_writew
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static inline void __raw_writel(unsigned int v, volatile void __iomem *addr)
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{
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*(volatile unsigned int __force *)PCI_FIX_ADDR(addr) = v;
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}
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#define __raw_writel __raw_writel
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#ifdef __powerpc64__
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static inline unsigned long __raw_readq(const volatile void __iomem *addr)
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{
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return *(volatile unsigned long __force *)PCI_FIX_ADDR(addr);
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}
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#define __raw_readq __raw_readq
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static inline void __raw_writeq(unsigned long v, volatile void __iomem *addr)
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{
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*(volatile unsigned long __force *)PCI_FIX_ADDR(addr) = v;
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}
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#define __raw_writeq __raw_writeq
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static inline void __raw_writeq_be(unsigned long v, volatile void __iomem *addr)
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{
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__raw_writeq((__force unsigned long)cpu_to_be64(v), addr);
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}
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#define __raw_writeq_be __raw_writeq_be
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/*
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* Real mode versions of the above. Those instructions are only supposed
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@ -609,10 +624,37 @@ static inline void name at \
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/* Some drivers check for the presence of readq & writeq with
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* a #ifdef, so we make them happy here.
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*/
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#define readb readb
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#define readw readw
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#define readl readl
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#define writeb writeb
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#define writew writew
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#define writel writel
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#define readsb readsb
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#define readsw readsw
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#define readsl readsl
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#define writesb writesb
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#define writesw writesw
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#define writesl writesl
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#define inb inb
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#define inw inw
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#define inl inl
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#define outb outb
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#define outw outw
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#define outl outl
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#define insb insb
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#define insw insw
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#define insl insl
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#define outsb outsb
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#define outsw outsw
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#define outsl outsl
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#ifdef __powerpc64__
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#define readq readq
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#define writeq writeq
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#endif
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#define memset_io memset_io
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#define memcpy_fromio memcpy_fromio
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#define memcpy_toio memcpy_toio
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/*
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* Convert a physical pointer to a virtual kernel pointer for /dev/mem
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@ -637,7 +679,106 @@ static inline void name at \
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#define writel_relaxed(v, addr) writel(v, addr)
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#define writeq_relaxed(v, addr) writeq(v, addr)
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#ifdef CONFIG_GENERIC_IOMAP
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#include <asm-generic/iomap.h>
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#else
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/*
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* Here comes the implementation of the IOMAP interfaces.
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*/
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static inline unsigned int ioread16be(const void __iomem *addr)
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{
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return readw_be(addr);
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}
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#define ioread16be ioread16be
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static inline unsigned int ioread32be(const void __iomem *addr)
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{
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return readl_be(addr);
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}
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#define ioread32be ioread32be
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#ifdef __powerpc64__
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static inline u64 ioread64_lo_hi(const void __iomem *addr)
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{
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return readq(addr);
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}
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#define ioread64_lo_hi ioread64_lo_hi
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static inline u64 ioread64_hi_lo(const void __iomem *addr)
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{
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return readq(addr);
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}
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#define ioread64_hi_lo ioread64_hi_lo
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static inline u64 ioread64be(const void __iomem *addr)
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{
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return readq_be(addr);
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}
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#define ioread64be ioread64be
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static inline u64 ioread64be_lo_hi(const void __iomem *addr)
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{
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return readq_be(addr);
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}
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#define ioread64be_lo_hi ioread64be_lo_hi
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static inline u64 ioread64be_hi_lo(const void __iomem *addr)
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{
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return readq_be(addr);
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}
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#define ioread64be_hi_lo ioread64be_hi_lo
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#endif /* __powerpc64__ */
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static inline void iowrite16be(u16 val, void __iomem *addr)
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{
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writew_be(val, addr);
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}
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#define iowrite16be iowrite16be
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static inline void iowrite32be(u32 val, void __iomem *addr)
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{
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writel_be(val, addr);
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}
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#define iowrite32be iowrite32be
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#ifdef __powerpc64__
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static inline void iowrite64_lo_hi(u64 val, void __iomem *addr)
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{
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writeq(val, addr);
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}
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#define iowrite64_lo_hi iowrite64_lo_hi
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static inline void iowrite64_hi_lo(u64 val, void __iomem *addr)
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{
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writeq(val, addr);
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}
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#define iowrite64_hi_lo iowrite64_hi_lo
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static inline void iowrite64be(u64 val, void __iomem *addr)
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{
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writeq_be(val, addr);
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}
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#define iowrite64be iowrite64be
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static inline void iowrite64be_lo_hi(u64 val, void __iomem *addr)
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{
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writeq_be(val, addr);
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}
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#define iowrite64be_lo_hi iowrite64be_lo_hi
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static inline void iowrite64be_hi_lo(u64 val, void __iomem *addr)
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{
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writeq_be(val, addr);
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}
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#define iowrite64be_hi_lo iowrite64be_hi_lo
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#endif /* __powerpc64__ */
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struct pci_dev;
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void pci_iounmap(struct pci_dev *dev, void __iomem *addr);
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#define pci_iounmap pci_iounmap
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void __iomem *ioport_map(unsigned long port, unsigned int len);
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#define ioport_map ioport_map
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#endif
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static inline void iosync(void)
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{
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@ -670,7 +811,6 @@ static inline void iosync(void)
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#define IO_SPACE_LIMIT ~(0UL)
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/**
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* ioremap - map bus memory into CPU space
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* @address: bus address of the memory
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@ -706,7 +846,13 @@ extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
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extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size,
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unsigned long flags);
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extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size);
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#define ioremap_wc ioremap_wc
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#ifdef CONFIG_PPC32
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void __iomem *ioremap_wt(phys_addr_t address, unsigned long size);
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#define ioremap_wt ioremap_wt
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#endif
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void __iomem *ioremap_coherent(phys_addr_t address, unsigned long size);
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#define ioremap_uc(addr, size) ioremap((addr), (size))
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#define ioremap_cache(addr, size) \
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@ -766,6 +912,7 @@ static inline unsigned long virt_to_phys(volatile void * address)
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return __pa((unsigned long)address);
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}
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#define virt_to_phys virt_to_phys
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/**
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* phys_to_virt - map physical address to virtual
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@ -783,6 +930,7 @@ static inline void * phys_to_virt(unsigned long address)
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{
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return (void *)__va(address);
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}
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#define phys_to_virt phys_to_virt
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/*
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* Change "struct page" to physical address.
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@ -810,6 +958,7 @@ static inline unsigned long virt_to_bus(volatile void * address)
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return 0;
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return __pa(address) + PCI_DRAM_OFFSET;
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}
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#define virt_to_bus virt_to_bus
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static inline void * bus_to_virt(unsigned long address)
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{
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@ -817,6 +966,7 @@ static inline void * bus_to_virt(unsigned long address)
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return NULL;
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return __va(address - PCI_DRAM_OFFSET);
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}
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#define bus_to_virt bus_to_virt
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#define page_to_bus(page) (page_to_phys(page) + PCI_DRAM_OFFSET)
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@ -855,6 +1005,8 @@ static inline void * bus_to_virt(unsigned long address)
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#define clrsetbits_8(addr, clear, set) clrsetbits(8, addr, clear, set)
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#include <asm-generic/io.h>
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#endif /* __KERNEL__ */
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#endif /* _ASM_POWERPC_IO_H */
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@ -11,177 +11,11 @@
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#include <asm/pci-bridge.h>
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#include <asm/isa-bridge.h>
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/*
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* Here comes the ppc64 implementation of the IOMAP
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* interfaces.
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*/
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unsigned int ioread8(const void __iomem *addr)
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{
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return readb(addr);
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}
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unsigned int ioread16(const void __iomem *addr)
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{
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return readw(addr);
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}
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unsigned int ioread16be(const void __iomem *addr)
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{
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return readw_be(addr);
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}
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unsigned int ioread32(const void __iomem *addr)
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{
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return readl(addr);
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}
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unsigned int ioread32be(const void __iomem *addr)
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{
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return readl_be(addr);
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}
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EXPORT_SYMBOL(ioread8);
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EXPORT_SYMBOL(ioread16);
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EXPORT_SYMBOL(ioread16be);
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EXPORT_SYMBOL(ioread32);
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EXPORT_SYMBOL(ioread32be);
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#ifdef __powerpc64__
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u64 ioread64(const void __iomem *addr)
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{
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return readq(addr);
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}
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u64 ioread64_lo_hi(const void __iomem *addr)
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{
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return readq(addr);
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}
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u64 ioread64_hi_lo(const void __iomem *addr)
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{
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return readq(addr);
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}
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u64 ioread64be(const void __iomem *addr)
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{
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return readq_be(addr);
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}
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u64 ioread64be_lo_hi(const void __iomem *addr)
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{
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return readq_be(addr);
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}
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u64 ioread64be_hi_lo(const void __iomem *addr)
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{
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return readq_be(addr);
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}
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EXPORT_SYMBOL(ioread64);
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EXPORT_SYMBOL(ioread64_lo_hi);
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EXPORT_SYMBOL(ioread64_hi_lo);
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EXPORT_SYMBOL(ioread64be);
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EXPORT_SYMBOL(ioread64be_lo_hi);
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EXPORT_SYMBOL(ioread64be_hi_lo);
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#endif /* __powerpc64__ */
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void iowrite8(u8 val, void __iomem *addr)
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{
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writeb(val, addr);
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}
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void iowrite16(u16 val, void __iomem *addr)
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{
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writew(val, addr);
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}
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void iowrite16be(u16 val, void __iomem *addr)
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{
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writew_be(val, addr);
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}
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void iowrite32(u32 val, void __iomem *addr)
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{
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writel(val, addr);
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}
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void iowrite32be(u32 val, void __iomem *addr)
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{
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writel_be(val, addr);
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}
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EXPORT_SYMBOL(iowrite8);
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EXPORT_SYMBOL(iowrite16);
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EXPORT_SYMBOL(iowrite16be);
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EXPORT_SYMBOL(iowrite32);
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EXPORT_SYMBOL(iowrite32be);
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#ifdef __powerpc64__
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void iowrite64(u64 val, void __iomem *addr)
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{
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writeq(val, addr);
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}
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void iowrite64_lo_hi(u64 val, void __iomem *addr)
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{
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writeq(val, addr);
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}
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void iowrite64_hi_lo(u64 val, void __iomem *addr)
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{
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writeq(val, addr);
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}
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void iowrite64be(u64 val, void __iomem *addr)
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{
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writeq_be(val, addr);
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}
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void iowrite64be_lo_hi(u64 val, void __iomem *addr)
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{
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writeq_be(val, addr);
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}
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void iowrite64be_hi_lo(u64 val, void __iomem *addr)
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{
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writeq_be(val, addr);
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}
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EXPORT_SYMBOL(iowrite64);
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EXPORT_SYMBOL(iowrite64_lo_hi);
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EXPORT_SYMBOL(iowrite64_hi_lo);
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EXPORT_SYMBOL(iowrite64be);
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EXPORT_SYMBOL(iowrite64be_lo_hi);
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EXPORT_SYMBOL(iowrite64be_hi_lo);
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#endif /* __powerpc64__ */
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/*
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* These are the "repeat read/write" functions. Note the
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* non-CPU byte order. We do things in "IO byteorder"
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* here.
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*
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* FIXME! We could make these do EEH handling if we really
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* wanted. Not clear if we do.
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*/
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void ioread8_rep(const void __iomem *addr, void *dst, unsigned long count)
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{
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readsb(addr, dst, count);
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}
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void ioread16_rep(const void __iomem *addr, void *dst, unsigned long count)
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{
|
||||
readsw(addr, dst, count);
|
||||
}
|
||||
void ioread32_rep(const void __iomem *addr, void *dst, unsigned long count)
|
||||
{
|
||||
readsl(addr, dst, count);
|
||||
}
|
||||
EXPORT_SYMBOL(ioread8_rep);
|
||||
EXPORT_SYMBOL(ioread16_rep);
|
||||
EXPORT_SYMBOL(ioread32_rep);
|
||||
|
||||
void iowrite8_rep(void __iomem *addr, const void *src, unsigned long count)
|
||||
{
|
||||
writesb(addr, src, count);
|
||||
}
|
||||
void iowrite16_rep(void __iomem *addr, const void *src, unsigned long count)
|
||||
{
|
||||
writesw(addr, src, count);
|
||||
}
|
||||
void iowrite32_rep(void __iomem *addr, const void *src, unsigned long count)
|
||||
{
|
||||
writesl(addr, src, count);
|
||||
}
|
||||
EXPORT_SYMBOL(iowrite8_rep);
|
||||
EXPORT_SYMBOL(iowrite16_rep);
|
||||
EXPORT_SYMBOL(iowrite32_rep);
|
||||
|
||||
void __iomem *ioport_map(unsigned long port, unsigned int len)
|
||||
{
|
||||
return (void __iomem *) (port + _IO_BASE);
|
||||
}
|
||||
|
||||
void ioport_unmap(void __iomem *addr)
|
||||
{
|
||||
/* Nothing to do */
|
||||
}
|
||||
EXPORT_SYMBOL(ioport_map);
|
||||
EXPORT_SYMBOL(ioport_unmap);
|
||||
|
||||
#ifdef CONFIG_PCI
|
||||
void pci_iounmap(struct pci_dev *dev, void __iomem *addr)
|
||||
|
|
|
|||
Loading…
Reference in New Issue