drm/amd/powerplay: Tidy up vega10_fan_ctrl_set_static_mode()
Signed-off-by: Tom St Denis <tom.stdenis@amd.com> Reviewed-by: Rex Zhu <Rex.Zhu@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -141,23 +141,20 @@ int vega10_fan_ctrl_set_static_mode(struct pp_hwmgr *hwmgr, uint32_t mode)
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if (hwmgr->fan_ctrl_is_in_default_mode) {
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hwmgr->fan_ctrl_default_mode =
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(cgs_read_register(hwmgr->device, reg) &
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CG_FDO_CTRL2__FDO_PWM_MODE_MASK) >>
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CG_FDO_CTRL2__FDO_PWM_MODE__SHIFT;
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hwmgr->tmin = (cgs_read_register(hwmgr->device, reg) &
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CG_FDO_CTRL2__TMIN_MASK) >>
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CG_FDO_CTRL2__TMIN__SHIFT;
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CGS_REG_GET_FIELD(cgs_read_register(hwmgr->device, reg),
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CG_FDO_CTRL2, FDO_PWM_MODE);
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hwmgr->tmin =
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CGS_REG_GET_FIELD(cgs_read_register(hwmgr->device, reg),
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CG_FDO_CTRL2, TMIN);
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hwmgr->fan_ctrl_is_in_default_mode = false;
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}
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cgs_write_register(hwmgr->device, reg,
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(cgs_read_register(hwmgr->device, reg) &
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~CG_FDO_CTRL2__TMIN_MASK) |
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(0 << CG_FDO_CTRL2__TMIN__SHIFT));
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CGS_REG_SET_FIELD(cgs_read_register(hwmgr->device, reg),
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CG_FDO_CTRL2, TMIN, 0));
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cgs_write_register(hwmgr->device, reg,
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(cgs_read_register(hwmgr->device, reg) &
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~CG_FDO_CTRL2__FDO_PWM_MODE_MASK) |
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(mode << CG_FDO_CTRL2__FDO_PWM_MODE__SHIFT));
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CGS_REG_SET_FIELD(cgs_read_register(hwmgr->device, reg),
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CG_FDO_CTRL2, FDO_PWM_MODE, mode));
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return 0;
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}
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