[media] gscaler: Add core functionality for the G-Scaler driver
This patch adds the core functionality for the G-Scaler driver. Signed-off-by: Hynwoong Kim <khw0178.kim@samsung.com> Signed-off-by: Sungchun Kang <sungchun.kang@samsung.com> Signed-off-by: Shaik Ameer Basha <shaik.ameer@samsung.com> Reviewed-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Sylwester Nawrocki <s.nawrocki@samsung.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Sungchun Kang
Mauro Carvalho Chehab
parent
199854a3a8
commit
8906969976
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/*
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* Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd.
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* http://www.samsung.com
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*
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* header file for Samsung EXYNOS5 SoC series G-Scaler driver
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef GSC_CORE_H_
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#define GSC_CORE_H_
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#include <linux/delay.h>
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#include <linux/sched.h>
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#include <linux/spinlock.h>
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#include <linux/types.h>
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#include <linux/videodev2.h>
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#include <linux/io.h>
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#include <linux/pm_runtime.h>
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#include <media/videobuf2-core.h>
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#include <media/v4l2-ctrls.h>
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#include <media/v4l2-device.h>
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#include <media/v4l2-mem2mem.h>
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#include <media/v4l2-mediabus.h>
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#include <media/videobuf2-dma-contig.h>
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#include "gsc-regs.h"
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#define CONFIG_VB2_GSC_DMA_CONTIG 1
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#define GSC_MODULE_NAME "exynos-gsc"
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#define GSC_SHUTDOWN_TIMEOUT ((100*HZ)/1000)
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#define GSC_MAX_DEVS 4
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#define GSC_M2M_BUF_NUM 0
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#define GSC_MAX_CTRL_NUM 10
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#define GSC_SC_ALIGN_4 4
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#define GSC_SC_ALIGN_2 2
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#define DEFAULT_CSC_EQ 1
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#define DEFAULT_CSC_RANGE 1
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#define GSC_PARAMS (1 << 0)
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#define GSC_SRC_FMT (1 << 1)
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#define GSC_DST_FMT (1 << 2)
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#define GSC_CTX_M2M (1 << 3)
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#define GSC_CTX_STOP_REQ (1 << 6)
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enum gsc_dev_flags {
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/* for global */
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ST_SUSPEND,
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/* for m2m node */
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ST_M2M_OPEN,
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ST_M2M_RUN,
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ST_M2M_PEND,
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ST_M2M_SUSPENDED,
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ST_M2M_SUSPENDING,
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};
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enum gsc_irq {
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GSC_IRQ_DONE,
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GSC_IRQ_OVERRUN
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};
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/**
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* enum gsc_datapath - the path of data used for G-Scaler
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* @GSC_CAMERA: from camera
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* @GSC_DMA: from/to DMA
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* @GSC_LOCAL: to local path
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* @GSC_WRITEBACK: from FIMD
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*/
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enum gsc_datapath {
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GSC_CAMERA = 0x1,
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GSC_DMA,
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GSC_MIXER,
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GSC_FIMD,
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GSC_WRITEBACK,
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};
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enum gsc_color_fmt {
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GSC_RGB = 0x1,
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GSC_YUV420 = 0x2,
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GSC_YUV422 = 0x4,
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GSC_YUV444 = 0x8,
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};
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enum gsc_yuv_fmt {
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GSC_LSB_Y = 0x10,
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GSC_LSB_C,
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GSC_CBCR = 0x20,
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GSC_CRCB,
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};
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#define fh_to_ctx(__fh) container_of(__fh, struct gsc_ctx, fh)
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#define is_rgb(x) (!!((x) & 0x1))
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#define is_yuv420(x) (!!((x) & 0x2))
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#define is_yuv422(x) (!!((x) & 0x4))
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#define gsc_m2m_active(dev) test_bit(ST_M2M_RUN, &(dev)->state)
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#define gsc_m2m_pending(dev) test_bit(ST_M2M_PEND, &(dev)->state)
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#define gsc_m2m_opened(dev) test_bit(ST_M2M_OPEN, &(dev)->state)
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#define ctrl_to_ctx(__ctrl) \
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container_of((__ctrl)->handler, struct gsc_ctx, ctrl_handler)
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/**
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* struct gsc_fmt - the driver's internal color format data
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* @mbus_code: Media Bus pixel code, -1 if not applicable
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* @name: format description
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* @pixelformat: the fourcc code for this format, 0 if not applicable
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* @yorder: Y/C order
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* @corder: Chrominance order control
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* @num_planes: number of physically non-contiguous data planes
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* @nr_comp: number of physically contiguous data planes
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* @depth: per plane driver's private 'number of bits per pixel'
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* @flags: flags indicating which operation mode format applies to
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*/
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struct gsc_fmt {
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enum v4l2_mbus_pixelcode mbus_code;
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char *name;
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u32 pixelformat;
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u32 color;
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u32 yorder;
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u32 corder;
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u16 num_planes;
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u16 num_comp;
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u8 depth[VIDEO_MAX_PLANES];
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u32 flags;
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};
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/**
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* struct gsc_input_buf - the driver's video buffer
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* @vb: videobuf2 buffer
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* @list : linked list structure for buffer queue
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* @idx : index of G-Scaler input buffer
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*/
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struct gsc_input_buf {
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struct vb2_buffer vb;
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struct list_head list;
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int idx;
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};
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/**
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* struct gsc_addr - the G-Scaler physical address set
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* @y: luminance plane address
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* @cb: Cb plane address
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* @cr: Cr plane address
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*/
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struct gsc_addr {
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dma_addr_t y;
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dma_addr_t cb;
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dma_addr_t cr;
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};
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/* struct gsc_ctrls - the G-Scaler control set
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* @rotate: rotation degree
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* @hflip: horizontal flip
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* @vflip: vertical flip
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* @global_alpha: the alpha value of current frame
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*/
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struct gsc_ctrls {
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struct v4l2_ctrl *rotate;
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struct v4l2_ctrl *hflip;
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struct v4l2_ctrl *vflip;
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struct v4l2_ctrl *global_alpha;
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};
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/**
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* struct gsc_scaler - the configuration data for G-Scaler inetrnal scaler
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* @pre_shfactor: pre sclaer shift factor
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* @pre_hratio: horizontal ratio of the prescaler
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* @pre_vratio: vertical ratio of the prescaler
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* @main_hratio: the main scaler's horizontal ratio
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* @main_vratio: the main scaler's vertical ratio
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*/
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struct gsc_scaler {
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u32 pre_shfactor;
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u32 pre_hratio;
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u32 pre_vratio;
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u32 main_hratio;
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u32 main_vratio;
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};
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struct gsc_dev;
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struct gsc_ctx;
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/**
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* struct gsc_frame - source/target frame properties
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* @f_width: SRC : SRCIMG_WIDTH, DST : OUTPUTDMA_WHOLE_IMG_WIDTH
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* @f_height: SRC : SRCIMG_HEIGHT, DST : OUTPUTDMA_WHOLE_IMG_HEIGHT
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* @crop: cropped(source)/scaled(destination) size
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* @payload: image size in bytes (w x h x bpp)
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* @addr: image frame buffer physical addresses
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* @fmt: G-Scaler color format pointer
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* @colorspace: value indicating v4l2_colorspace
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* @alpha: frame's alpha value
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*/
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struct gsc_frame {
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u32 f_width;
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u32 f_height;
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struct v4l2_rect crop;
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unsigned long payload[VIDEO_MAX_PLANES];
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struct gsc_addr addr;
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const struct gsc_fmt *fmt;
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u32 colorspace;
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u8 alpha;
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};
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/**
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* struct gsc_m2m_device - v4l2 memory-to-memory device data
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* @vfd: the video device node for v4l2 m2m mode
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* @m2m_dev: v4l2 memory-to-memory device data
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* @ctx: hardware context data
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* @refcnt: the reference counter
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*/
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struct gsc_m2m_device {
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struct video_device *vfd;
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struct v4l2_m2m_dev *m2m_dev;
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struct gsc_ctx *ctx;
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int refcnt;
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};
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/**
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* struct gsc_pix_max - image pixel size limits in various IP configurations
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*
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* @org_scaler_bypass_w: max pixel width when the scaler is disabled
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* @org_scaler_bypass_h: max pixel height when the scaler is disabled
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* @org_scaler_input_w: max pixel width when the scaler is enabled
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* @org_scaler_input_h: max pixel height when the scaler is enabled
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* @real_rot_dis_w: max pixel src cropped height with the rotator is off
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* @real_rot_dis_h: max pixel src croppped width with the rotator is off
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* @real_rot_en_w: max pixel src cropped width with the rotator is on
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* @real_rot_en_h: max pixel src cropped height with the rotator is on
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* @target_rot_dis_w: max pixel dst scaled width with the rotator is off
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* @target_rot_dis_h: max pixel dst scaled height with the rotator is off
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* @target_rot_en_w: max pixel dst scaled width with the rotator is on
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* @target_rot_en_h: max pixel dst scaled height with the rotator is on
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*/
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struct gsc_pix_max {
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u16 org_scaler_bypass_w;
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u16 org_scaler_bypass_h;
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u16 org_scaler_input_w;
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u16 org_scaler_input_h;
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u16 real_rot_dis_w;
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u16 real_rot_dis_h;
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u16 real_rot_en_w;
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u16 real_rot_en_h;
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u16 target_rot_dis_w;
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u16 target_rot_dis_h;
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u16 target_rot_en_w;
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u16 target_rot_en_h;
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};
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/**
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* struct gsc_pix_min - image pixel size limits in various IP configurations
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*
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* @org_w: minimum source pixel width
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* @org_h: minimum source pixel height
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* @real_w: minimum input crop pixel width
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* @real_h: minimum input crop pixel height
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* @target_rot_dis_w: minimum output scaled pixel height when rotator is off
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* @target_rot_dis_h: minimum output scaled pixel height when rotator is off
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* @target_rot_en_w: minimum output scaled pixel height when rotator is on
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* @target_rot_en_h: minimum output scaled pixel height when rotator is on
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*/
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struct gsc_pix_min {
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u16 org_w;
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u16 org_h;
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u16 real_w;
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u16 real_h;
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u16 target_rot_dis_w;
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u16 target_rot_dis_h;
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u16 target_rot_en_w;
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u16 target_rot_en_h;
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};
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struct gsc_pix_align {
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u16 org_h;
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u16 org_w;
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u16 offset_h;
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u16 real_w;
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u16 real_h;
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u16 target_w;
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u16 target_h;
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};
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/**
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* struct gsc_variant - G-Scaler variant information
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*/
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struct gsc_variant {
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struct gsc_pix_max *pix_max;
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struct gsc_pix_min *pix_min;
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struct gsc_pix_align *pix_align;
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u16 in_buf_cnt;
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u16 out_buf_cnt;
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u16 sc_up_max;
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u16 sc_down_max;
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u16 poly_sc_down_max;
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u16 pre_sc_down_max;
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u16 local_sc_down;
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};
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/**
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* struct gsc_driverdata - per device type driver data for init time.
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*
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* @variant: the variant information for this driver.
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* @lclk_frequency: G-Scaler clock frequency
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* @num_entities: the number of g-scalers
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*/
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struct gsc_driverdata {
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struct gsc_variant *variant[GSC_MAX_DEVS];
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unsigned long lclk_frequency;
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int num_entities;
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};
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/**
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* struct gsc_dev - abstraction for G-Scaler entity
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* @slock: the spinlock protecting this data structure
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* @lock: the mutex protecting this data structure
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* @pdev: pointer to the G-Scaler platform device
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* @variant: the IP variant information
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* @id: G-Scaler device index (0..GSC_MAX_DEVS)
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* @clock: clocks required for G-Scaler operation
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* @regs: the mapped hardware registers
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* @irq_queue: interrupt handler waitqueue
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* @m2m: memory-to-memory V4L2 device information
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* @state: flags used to synchronize m2m and capture mode operation
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* @alloc_ctx: videobuf2 memory allocator context
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* @vdev: video device for G-Scaler instance
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*/
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struct gsc_dev {
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spinlock_t slock;
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struct mutex lock;
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struct platform_device *pdev;
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struct gsc_variant *variant;
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u16 id;
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struct clk *clock;
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void __iomem *regs;
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wait_queue_head_t irq_queue;
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struct gsc_m2m_device m2m;
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struct exynos_platform_gscaler *pdata;
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unsigned long state;
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struct vb2_alloc_ctx *alloc_ctx;
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struct video_device vdev;
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};
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/**
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* gsc_ctx - the device context data
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* @s_frame: source frame properties
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* @d_frame: destination frame properties
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* @in_path: input mode (DMA or camera)
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* @out_path: output mode (DMA or FIFO)
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* @scaler: image scaler properties
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* @flags: additional flags for image conversion
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* @state: flags to keep track of user configuration
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* @gsc_dev: the G-Scaler device this context applies to
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* @m2m_ctx: memory-to-memory device context
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* @fh: v4l2 file handle
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* @ctrl_handler: v4l2 controls handler
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* @gsc_ctrls G-Scaler control set
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* @ctrls_rdy: true if the control handler is initialized
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*/
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struct gsc_ctx {
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struct gsc_frame s_frame;
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struct gsc_frame d_frame;
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enum gsc_datapath in_path;
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enum gsc_datapath out_path;
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struct gsc_scaler scaler;
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u32 flags;
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u32 state;
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int rotation;
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unsigned int hflip:1;
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unsigned int vflip:1;
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struct gsc_dev *gsc_dev;
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struct v4l2_m2m_ctx *m2m_ctx;
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struct v4l2_fh fh;
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struct v4l2_ctrl_handler ctrl_handler;
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struct gsc_ctrls gsc_ctrls;
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bool ctrls_rdy;
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};
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void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm);
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int gsc_register_m2m_device(struct gsc_dev *gsc);
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void gsc_unregister_m2m_device(struct gsc_dev *gsc);
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void gsc_m2m_job_finish(struct gsc_ctx *ctx, int vb_state);
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u32 get_plane_size(struct gsc_frame *fr, unsigned int plane);
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const struct gsc_fmt *get_format(int index);
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const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index);
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int gsc_enum_fmt_mplane(struct v4l2_fmtdesc *f);
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int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
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void gsc_set_frame_size(struct gsc_frame *frame, int width, int height);
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int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f);
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void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h);
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int gsc_g_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr);
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int gsc_try_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr);
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int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst,
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u32 *ratio);
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void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh);
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void gsc_check_src_scale_info(struct gsc_variant *var,
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struct gsc_frame *s_frame,
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u32 *wratio, u32 tx, u32 ty, u32 *hratio);
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int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw,
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int dh, int rot, int out_path);
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int gsc_set_scaler_info(struct gsc_ctx *ctx);
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int gsc_ctrls_create(struct gsc_ctx *ctx);
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void gsc_ctrls_delete(struct gsc_ctx *ctx);
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int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb,
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struct gsc_frame *frame, struct gsc_addr *addr);
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static inline void gsc_ctx_state_lock_set(u32 state, struct gsc_ctx *ctx)
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{
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unsigned long flags;
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spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
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ctx->state |= state;
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spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
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}
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static inline void gsc_ctx_state_lock_clear(u32 state, struct gsc_ctx *ctx)
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{
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unsigned long flags;
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spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
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ctx->state &= ~state;
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spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
|
||||
}
|
||||
|
||||
static inline void gsc_hw_enable_control(struct gsc_dev *dev, bool on)
|
||||
{
|
||||
u32 cfg = readl(dev->regs + GSC_ENABLE);
|
||||
|
||||
if (on)
|
||||
cfg |= GSC_ENABLE_ON;
|
||||
else
|
||||
cfg &= ~GSC_ENABLE_ON;
|
||||
|
||||
writel(cfg, dev->regs + GSC_ENABLE);
|
||||
}
|
||||
|
||||
static inline int gsc_hw_get_irq_status(struct gsc_dev *dev)
|
||||
{
|
||||
u32 cfg = readl(dev->regs + GSC_IRQ);
|
||||
if (cfg & GSC_IRQ_STATUS_OR_IRQ)
|
||||
return GSC_IRQ_OVERRUN;
|
||||
else
|
||||
return GSC_IRQ_DONE;
|
||||
|
||||
}
|
||||
|
||||
static inline void gsc_hw_clear_irq(struct gsc_dev *dev, int irq)
|
||||
{
|
||||
u32 cfg = readl(dev->regs + GSC_IRQ);
|
||||
if (irq == GSC_IRQ_OVERRUN)
|
||||
cfg |= GSC_IRQ_STATUS_OR_IRQ;
|
||||
else if (irq == GSC_IRQ_DONE)
|
||||
cfg |= GSC_IRQ_STATUS_FRM_DONE_IRQ;
|
||||
writel(cfg, dev->regs + GSC_IRQ);
|
||||
}
|
||||
|
||||
static inline void gsc_lock(struct vb2_queue *vq)
|
||||
{
|
||||
struct gsc_ctx *ctx = vb2_get_drv_priv(vq);
|
||||
mutex_lock(&ctx->gsc_dev->lock);
|
||||
}
|
||||
|
||||
static inline void gsc_unlock(struct vb2_queue *vq)
|
||||
{
|
||||
struct gsc_ctx *ctx = vb2_get_drv_priv(vq);
|
||||
mutex_unlock(&ctx->gsc_dev->lock);
|
||||
}
|
||||
|
||||
static inline bool gsc_ctx_state_is_set(u32 mask, struct gsc_ctx *ctx)
|
||||
{
|
||||
unsigned long flags;
|
||||
bool ret;
|
||||
|
||||
spin_lock_irqsave(&ctx->gsc_dev->slock, flags);
|
||||
ret = (ctx->state & mask) == mask;
|
||||
spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags);
|
||||
return ret;
|
||||
}
|
||||
|
||||
static inline struct gsc_frame *ctx_get_frame(struct gsc_ctx *ctx,
|
||||
enum v4l2_buf_type type)
|
||||
{
|
||||
struct gsc_frame *frame;
|
||||
|
||||
if (V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE == type) {
|
||||
frame = &ctx->s_frame;
|
||||
} else if (V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE == type) {
|
||||
frame = &ctx->d_frame;
|
||||
} else {
|
||||
pr_err("Wrong buffer/video queue type (%d)", type);
|
||||
return ERR_PTR(-EINVAL);
|
||||
}
|
||||
|
||||
return frame;
|
||||
}
|
||||
|
||||
void gsc_hw_set_sw_reset(struct gsc_dev *dev);
|
||||
int gsc_wait_reset(struct gsc_dev *dev);
|
||||
|
||||
void gsc_hw_set_frm_done_irq_mask(struct gsc_dev *dev, bool mask);
|
||||
void gsc_hw_set_gsc_irq_enable(struct gsc_dev *dev, bool mask);
|
||||
void gsc_hw_set_input_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
|
||||
void gsc_hw_set_output_buf_masking(struct gsc_dev *dev, u32 shift, bool enable);
|
||||
void gsc_hw_set_input_addr(struct gsc_dev *dev, struct gsc_addr *addr,
|
||||
int index);
|
||||
void gsc_hw_set_output_addr(struct gsc_dev *dev, struct gsc_addr *addr,
|
||||
int index);
|
||||
void gsc_hw_set_input_path(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_in_size(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_in_image_rgb(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_in_image_format(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_output_path(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_out_size(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_out_image_rgb(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_out_image_format(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_prescaler(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_mainscaler(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_rotation(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_global_alpha(struct gsc_ctx *ctx);
|
||||
void gsc_hw_set_sfr_update(struct gsc_ctx *ctx);
|
||||
|
||||
#endif /* GSC_CORE_H_ */
|
||||
Loading…
Reference in New Issue