clk: meson: migrate the audio divider clock to clk_regmap
Rework meson audio divider driver to use clk_regmap and move gxbb clock using meson_clk_audio_divider to clk_regmap. Signed-off-by: Jerome Brunet <jbrunet@baylibre.com> Signed-off-by: Neil Armstrong <narmstrong@baylibre.com>
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c763e61ae8
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88a4e12836
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@ -28,8 +28,11 @@
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#include <linux/clk-provider.h>
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#include <linux/clk-provider.h>
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#include "clkc.h"
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#include "clkc.h"
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#define to_meson_clk_audio_divider(_hw) container_of(_hw, \
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static inline struct meson_clk_audio_div_data *
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struct meson_clk_audio_divider, hw)
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meson_clk_audio_div_data(struct clk_regmap *clk)
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{
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return (struct meson_clk_audio_div_data *)clk->data;
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}
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static int _div_round(unsigned long parent_rate, unsigned long rate,
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static int _div_round(unsigned long parent_rate, unsigned long rate,
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unsigned long flags)
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unsigned long flags)
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@ -45,15 +48,9 @@ static int _get_val(unsigned long parent_rate, unsigned long rate)
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return DIV_ROUND_UP_ULL((u64)parent_rate, rate) - 1;
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return DIV_ROUND_UP_ULL((u64)parent_rate, rate) - 1;
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}
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}
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static int _valid_divider(struct clk_hw *hw, int divider)
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static int _valid_divider(unsigned int width, int divider)
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{
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{
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struct meson_clk_audio_divider *adiv =
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int max_divider = 1 << width;
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to_meson_clk_audio_divider(hw);
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int max_divider;
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u8 width;
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width = adiv->div.width;
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max_divider = 1 << width;
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return clamp(divider, 1, max_divider);
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return clamp(divider, 1, max_divider);
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}
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}
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@ -61,14 +58,11 @@ static int _valid_divider(struct clk_hw *hw, int divider)
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static unsigned long audio_divider_recalc_rate(struct clk_hw *hw,
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static unsigned long audio_divider_recalc_rate(struct clk_hw *hw,
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unsigned long parent_rate)
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unsigned long parent_rate)
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{
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{
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struct meson_clk_audio_divider *adiv =
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struct clk_regmap *clk = to_clk_regmap(hw);
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to_meson_clk_audio_divider(hw);
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struct meson_clk_audio_div_data *adiv = meson_clk_audio_div_data(clk);
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struct parm *p;
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unsigned long divider;
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unsigned long reg, divider;
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p = &adiv->div;
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divider = meson_parm_read(clk->map, &adiv->div);
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reg = readl(adiv->base + p->reg_off);
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divider = PARM_GET(p->width, p->shift, reg) + 1;
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return DIV_ROUND_UP_ULL((u64)parent_rate, divider);
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return DIV_ROUND_UP_ULL((u64)parent_rate, divider);
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}
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}
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@ -77,14 +71,14 @@ static long audio_divider_round_rate(struct clk_hw *hw,
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unsigned long rate,
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unsigned long rate,
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unsigned long *parent_rate)
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unsigned long *parent_rate)
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{
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{
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struct meson_clk_audio_divider *adiv =
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struct clk_regmap *clk = to_clk_regmap(hw);
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to_meson_clk_audio_divider(hw);
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struct meson_clk_audio_div_data *adiv = meson_clk_audio_div_data(clk);
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unsigned long max_prate;
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unsigned long max_prate;
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int divider;
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int divider;
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if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) {
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if (!(clk_hw_get_flags(hw) & CLK_SET_RATE_PARENT)) {
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divider = _div_round(*parent_rate, rate, adiv->flags);
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divider = _div_round(*parent_rate, rate, adiv->flags);
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divider = _valid_divider(hw, divider);
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divider = _valid_divider(adiv->div.width, divider);
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return DIV_ROUND_UP_ULL((u64)*parent_rate, divider);
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return DIV_ROUND_UP_ULL((u64)*parent_rate, divider);
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}
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}
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@ -93,7 +87,7 @@ static long audio_divider_round_rate(struct clk_hw *hw,
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/* Get the corresponding rounded down divider */
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/* Get the corresponding rounded down divider */
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divider = max_prate / rate;
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divider = max_prate / rate;
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divider = _valid_divider(hw, divider);
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divider = _valid_divider(adiv->div.width, divider);
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/* Get actual rate of the parent */
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/* Get actual rate of the parent */
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*parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
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*parent_rate = clk_hw_round_rate(clk_hw_get_parent(hw),
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@ -106,28 +100,11 @@ static int audio_divider_set_rate(struct clk_hw *hw,
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unsigned long rate,
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unsigned long rate,
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unsigned long parent_rate)
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unsigned long parent_rate)
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{
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{
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struct meson_clk_audio_divider *adiv =
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struct clk_regmap *clk = to_clk_regmap(hw);
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to_meson_clk_audio_divider(hw);
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struct meson_clk_audio_div_data *adiv = meson_clk_audio_div_data(clk);
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struct parm *p;
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int val = _get_val(parent_rate, rate);
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unsigned long reg, flags = 0;
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int val;
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val = _get_val(parent_rate, rate);
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meson_parm_write(clk->map, &adiv->div, val);
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if (adiv->lock)
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spin_lock_irqsave(adiv->lock, flags);
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else
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__acquire(adiv->lock);
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p = &adiv->div;
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reg = readl(adiv->base + p->reg_off);
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reg = PARM_SET(p->width, p->shift, reg, val);
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writel(reg, adiv->base + p->reg_off);
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if (adiv->lock)
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spin_unlock_irqrestore(adiv->lock, flags);
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else
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__release(adiv->lock);
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return 0;
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return 0;
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}
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}
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@ -142,12 +142,9 @@ struct meson_clk_mpll_data {
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spinlock_t *lock;
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spinlock_t *lock;
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};
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};
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struct meson_clk_audio_divider {
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struct meson_clk_audio_div_data {
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struct clk_hw hw;
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void __iomem *base;
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struct parm div;
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struct parm div;
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u8 flags;
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u8 flags;
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spinlock_t *lock;
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};
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};
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#define MESON_GATE(_name, _reg, _bit) \
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#define MESON_GATE(_name, _reg, _bit) \
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@ -826,14 +826,15 @@ static struct clk_regmap gxbb_cts_amclk_sel = {
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},
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},
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};
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};
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static struct meson_clk_audio_divider gxbb_cts_amclk_div = {
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static struct clk_regmap gxbb_cts_amclk_div = {
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.div = {
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.data = &(struct meson_clk_audio_div_data){
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.reg_off = HHI_AUD_CLK_CNTL,
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.div = {
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.shift = 0,
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.reg_off = HHI_AUD_CLK_CNTL,
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.width = 8,
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.shift = 0,
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.width = 8,
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},
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.flags = CLK_DIVIDER_ROUND_CLOSEST,
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},
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},
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.flags = CLK_DIVIDER_ROUND_CLOSEST,
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.lock = &meson_clk_lock,
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.hw.init = &(struct clk_init_data){
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.hw.init = &(struct clk_init_data){
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.name = "cts_amclk_div",
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.name = "cts_amclk_div",
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.ops = &meson_clk_audio_divider_ops,
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.ops = &meson_clk_audio_divider_ops,
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@ -1777,10 +1778,6 @@ static struct meson_clk_pll *const gxl_clk_plls[] = {
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&gxl_gp0_pll,
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&gxl_gp0_pll,
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};
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};
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static struct meson_clk_audio_divider *const gxbb_audio_dividers[] = {
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&gxbb_cts_amclk_div,
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};
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static struct clk_regmap *const gx_clk_regmaps[] = {
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static struct clk_regmap *const gx_clk_regmaps[] = {
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&gxbb_clk81,
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&gxbb_clk81,
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&gxbb_ddr,
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&gxbb_ddr,
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@ -1912,29 +1909,24 @@ static struct clk_regmap *const gx_clk_regmaps[] = {
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&gxbb_mpll0,
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&gxbb_mpll0,
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&gxbb_mpll1,
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&gxbb_mpll1,
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&gxbb_mpll2,
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&gxbb_mpll2,
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&gxbb_cts_amclk_div,
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};
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};
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struct clkc_data {
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struct clkc_data {
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struct meson_clk_pll *const *clk_plls;
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struct meson_clk_pll *const *clk_plls;
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unsigned int clk_plls_count;
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unsigned int clk_plls_count;
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struct meson_clk_audio_divider *const *clk_audio_dividers;
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unsigned int clk_audio_dividers_count;
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struct clk_hw_onecell_data *hw_onecell_data;
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struct clk_hw_onecell_data *hw_onecell_data;
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};
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};
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static const struct clkc_data gxbb_clkc_data = {
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static const struct clkc_data gxbb_clkc_data = {
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.clk_plls = gxbb_clk_plls,
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.clk_plls = gxbb_clk_plls,
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.clk_plls_count = ARRAY_SIZE(gxbb_clk_plls),
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.clk_plls_count = ARRAY_SIZE(gxbb_clk_plls),
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.clk_audio_dividers = gxbb_audio_dividers,
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.clk_audio_dividers_count = ARRAY_SIZE(gxbb_audio_dividers),
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.hw_onecell_data = &gxbb_hw_onecell_data,
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.hw_onecell_data = &gxbb_hw_onecell_data,
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};
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};
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static const struct clkc_data gxl_clkc_data = {
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static const struct clkc_data gxl_clkc_data = {
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.clk_plls = gxl_clk_plls,
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.clk_plls = gxl_clk_plls,
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.clk_plls_count = ARRAY_SIZE(gxl_clk_plls),
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.clk_plls_count = ARRAY_SIZE(gxl_clk_plls),
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.clk_audio_dividers = gxbb_audio_dividers,
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.clk_audio_dividers_count = ARRAY_SIZE(gxbb_audio_dividers),
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.hw_onecell_data = &gxl_hw_onecell_data,
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.hw_onecell_data = &gxl_hw_onecell_data,
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};
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};
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@ -1981,10 +1973,6 @@ static int gxbb_clkc_probe(struct platform_device *pdev)
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for (i = 0; i < clkc_data->clk_plls_count; i++)
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for (i = 0; i < clkc_data->clk_plls_count; i++)
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clkc_data->clk_plls[i]->base = clk_base;
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clkc_data->clk_plls[i]->base = clk_base;
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/* Populate base address for the audio dividers */
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for (i = 0; i < clkc_data->clk_audio_dividers_count; i++)
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clkc_data->clk_audio_dividers[i]->base = clk_base;
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/* Populate regmap for the common regmap backed clocks */
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/* Populate regmap for the common regmap backed clocks */
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for (i = 0; i < ARRAY_SIZE(gx_clk_regmaps); i++)
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for (i = 0; i < ARRAY_SIZE(gx_clk_regmaps); i++)
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gx_clk_regmaps[i]->map = map;
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gx_clk_regmaps[i]->map = map;
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