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usb: renesas_usbhs: Add access control for INTSTS1 and INTENB1 register 

INTSTS1 and INTENB1 register of renesas_usbhs can access only Host mode.
This adds process of accessing INTSTS1 and INTENB1 only when renesas_usbhs
is Host mode.

Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Felipe Balbi <balbi@ti.com>
This commit is contained in:
Nobuhiro Iwamatsu 2015-01-09 09:28:41 +09:00 committed by Felipe Balbi
parent 1c14905ef9
commit 88a25e02f3
1 changed files with 34 additions and 27 deletions
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61
drivers/usb/renesas_usbhs/mod.c
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@ -218,10 +218,12 @@ static int usbhs_status_get_each_irq(struct usbhs_priv *priv,
/******************** spin lock ********************/ /******************** spin lock ********************/
usbhs_lock(priv, flags); usbhs_lock(priv, flags);
state->intsts0 = usbhs_read(priv, INTSTS0); state->intsts0 = usbhs_read(priv, INTSTS0);
state->intsts1 = usbhs_read(priv, INTSTS1);
intenb0 = usbhs_read(priv, INTENB0); intenb0 = usbhs_read(priv, INTENB0);
intenb1 = usbhs_read(priv, INTENB1);
if (usbhs_mod_is_host(priv)) {
state->intsts1 = usbhs_read(priv, INTSTS1);
intenb1 = usbhs_read(priv, INTENB1);
}
/* mask */ /* mask */
if (mod) { if (mod) {
@ -275,7 +277,8 @@ static irqreturn_t usbhs_interrupt(int irq, void *data)
* - Function :: VALID bit should 0 * - Function :: VALID bit should 0
*/ */
usbhs_write(priv, INTSTS0, ~irq_state.intsts0 & INTSTS0_MAGIC); usbhs_write(priv, INTSTS0, ~irq_state.intsts0 & INTSTS0_MAGIC);
usbhs_write(priv, INTSTS1, ~irq_state.intsts1 & INTSTS1_MAGIC); if (usbhs_mod_is_host(priv))
usbhs_write(priv, INTSTS1, ~irq_state.intsts1 & INTSTS1_MAGIC);
usbhs_write(priv, BRDYSTS, ~irq_state.brdysts); usbhs_write(priv, BRDYSTS, ~irq_state.brdysts);
usbhs_write(priv, NRDYSTS, ~irq_state.nrdysts); usbhs_write(priv, NRDYSTS, ~irq_state.nrdysts);
@ -303,19 +306,20 @@ static irqreturn_t usbhs_interrupt(int irq, void *data)
if (irq_state.intsts0 & BRDY) if (irq_state.intsts0 & BRDY)
usbhs_mod_call(priv, irq_ready, priv, &irq_state); usbhs_mod_call(priv, irq_ready, priv, &irq_state);
/* INTSTS1 */ if (usbhs_mod_is_host(priv)) {
if (irq_state.intsts1 & ATTCH) /* INTSTS1 */
usbhs_mod_call(priv, irq_attch, priv, &irq_state); if (irq_state.intsts1 & ATTCH)
usbhs_mod_call(priv, irq_attch, priv, &irq_state);
if (irq_state.intsts1 & DTCH) if (irq_state.intsts1 & DTCH)
usbhs_mod_call(priv, irq_dtch, priv, &irq_state); usbhs_mod_call(priv, irq_dtch, priv, &irq_state);
if (irq_state.intsts1 & SIGN) if (irq_state.intsts1 & SIGN)
usbhs_mod_call(priv, irq_sign, priv, &irq_state); usbhs_mod_call(priv, irq_sign, priv, &irq_state);
if (irq_state.intsts1 & SACK)
usbhs_mod_call(priv, irq_sack, priv, &irq_state);
if (irq_state.intsts1 & SACK)
usbhs_mod_call(priv, irq_sack, priv, &irq_state);
}
return IRQ_HANDLED; return IRQ_HANDLED;
} }
@ -334,7 +338,8 @@ void usbhs_irq_callback_update(struct usbhs_priv *priv, struct usbhs_mod *mod)
* - update INTSTS0 * - update INTSTS0
*/ */
usbhs_write(priv, INTENB0, 0); usbhs_write(priv, INTENB0, 0);
usbhs_write(priv, INTENB1, 0); if (usbhs_mod_is_host(priv))
usbhs_write(priv, INTENB1, 0);
usbhs_write(priv, BEMPENB, 0); usbhs_write(priv, BEMPENB, 0);
usbhs_write(priv, BRDYENB, 0); usbhs_write(priv, BRDYENB, 0);
@ -368,25 +373,27 @@ void usbhs_irq_callback_update(struct usbhs_priv *priv, struct usbhs_mod *mod)
intenb0 |= BRDYE; intenb0 |= BRDYE;
} }
/* if (usbhs_mod_is_host(priv)) {
* INTSTS1 /*
*/ * INTSTS1
if (mod->irq_attch) */
intenb1 |= ATTCHE; if (mod->irq_attch)
intenb1 |= ATTCHE;
if (mod->irq_dtch) if (mod->irq_dtch)
intenb1 |= DTCHE; intenb1 |= DTCHE;
if (mod->irq_sign) if (mod->irq_sign)
intenb1 |= SIGNE; intenb1 |= SIGNE;
if (mod->irq_sack) if (mod->irq_sack)
intenb1 |= SACKE; intenb1 |= SACKE;
}
} }
if (intenb0) if (intenb0)
usbhs_write(priv, INTENB0, intenb0); usbhs_write(priv, INTENB0, intenb0);
if (intenb1) if (usbhs_mod_is_host(priv) && intenb1)
usbhs_write(priv, INTENB1, intenb1); usbhs_write(priv, INTENB1, intenb1);
} }