xtensa: drop dead PCI support code
xtensa-specific PCI initialization code has significantly bitrotted over time because there's no platform that use it. Get rid of remaining non-functioning initialization and remove platform_pcibios_* interface. A new platform that would use PCI on xtensa will configure PCI controller using device tree. Drop variables pci_ctrl_head, pci_bus_count and functions pcibios_init, pci_controller_apertures, platform_pcibios_init and platform_pcibios_fixup. Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
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@ -54,16 +54,6 @@ extern void platform_idle (void);
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*/
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extern void platform_heartbeat (void);
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/*
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* platform_pcibios_init is called to allow the platform to setup the pci bus.
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*/
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extern void platform_pcibios_init (void);
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/*
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* platform_pcibios_fixup allows to modify the PCI configuration.
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*/
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extern int platform_pcibios_fixup (void);
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/*
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* platform_calibrate_ccount calibrates cpu clock freq (CONFIG_XTENSA_CALIBRATE)
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*/
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@ -24,22 +24,6 @@
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#include <asm/pci-bridge.h>
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#include <asm/platform.h>
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/* PCI Controller */
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/*
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* pcibios_alloc_controller
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* pcibios_enable_device
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* pcibios_fixups
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* pcibios_align_resource
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* pcibios_fixup_bus
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* pci_bus_add_device
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*/
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static struct pci_controller *pci_ctrl_head;
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static int pci_bus_count;
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/*
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* We need to avoid collisions with `mirrored' VGA ports
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* and other strange ISA hardware, so we always want the
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@ -74,81 +58,6 @@ pcibios_align_resource(void *data, const struct resource *res,
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return start;
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}
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static void __init pci_controller_apertures(struct pci_controller *pci_ctrl,
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struct list_head *resources)
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{
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struct resource *res;
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unsigned long io_offset;
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int i;
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io_offset = (unsigned long)pci_ctrl->io_space.base;
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res = &pci_ctrl->io_resource;
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if (!res->flags) {
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if (io_offset)
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pr_err("I/O resource not set for host bridge %d\n",
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pci_ctrl->index);
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res->start = 0;
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res->end = IO_SPACE_LIMIT;
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res->flags = IORESOURCE_IO;
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}
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res->start += io_offset;
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res->end += io_offset;
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pci_add_resource_offset(resources, res, io_offset);
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for (i = 0; i < 3; i++) {
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res = &pci_ctrl->mem_resources[i];
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if (!res->flags) {
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if (i > 0)
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continue;
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pr_err("Memory resource not set for host bridge %d\n",
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pci_ctrl->index);
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res->start = 0;
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res->end = ~0U;
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res->flags = IORESOURCE_MEM;
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}
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pci_add_resource(resources, res);
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}
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}
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static int __init pcibios_init(void)
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{
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struct pci_controller *pci_ctrl;
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struct list_head resources;
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struct pci_bus *bus;
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int next_busno = 0, ret;
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pr_info("PCI: Probing PCI hardware\n");
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/* Scan all of the recorded PCI controllers. */
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for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
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pci_ctrl->last_busno = 0xff;
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INIT_LIST_HEAD(&resources);
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pci_controller_apertures(pci_ctrl, &resources);
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bus = pci_scan_root_bus(NULL, pci_ctrl->first_busno,
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pci_ctrl->ops, pci_ctrl, &resources);
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if (!bus)
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continue;
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pci_ctrl->bus = bus;
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pci_ctrl->last_busno = bus->busn_res.end;
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if (next_busno <= pci_ctrl->last_busno)
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next_busno = pci_ctrl->last_busno+1;
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}
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pci_bus_count = next_busno;
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ret = platform_pcibios_fixup();
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if (ret)
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return ret;
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for (pci_ctrl = pci_ctrl_head; pci_ctrl; pci_ctrl = pci_ctrl->next) {
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if (pci_ctrl->bus)
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pci_bus_add_devices(pci_ctrl->bus);
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}
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return 0;
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}
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subsys_initcall(pcibios_init);
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void pcibios_fixup_bus(struct pci_bus *bus)
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{
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if (bus->parent) {
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@ -34,8 +34,6 @@ _F(void, halt, (void), { while(1); });
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_F(void, power_off, (void), { while(1); });
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_F(void, idle, (void), { __asm__ __volatile__ ("waiti 0" ::: "memory"); });
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_F(void, heartbeat, (void), { });
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_F(int, pcibios_fixup, (void), { return 0; });
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_F(void, pcibios_init, (void), { });
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#ifdef CONFIG_XTENSA_CALIBRATE_CCOUNT
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_F(void, calibrate_ccount, (void),
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@ -405,10 +405,6 @@ void __init setup_arch(char **cmdline_p)
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conswitchp = &dummy_con;
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# endif
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#endif
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#ifdef CONFIG_PCI
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platform_pcibios_init();
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#endif
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}
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static DEFINE_PER_CPU(struct cpu, cpu_data);
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