mt76: mt7663: fix mt7615_mac_cca_stats_reset routine
Fix PHYMUX_5 register definition for mt7663 in
mt7615_mac_cca_stats_reset routine
Fixes: f40ac0f3d3
("mt76: mt7615: introduce mt7663e support")
Signed-off-by: Lorenzo Bianconi <lorenzo@kernel.org>
Signed-off-by: Felix Fietkau <nbd@nbd.name>
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@ -1576,8 +1576,14 @@ void mt7615_mac_cca_stats_reset(struct mt7615_phy *phy)
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{
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struct mt7615_dev *dev = phy->dev;
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bool ext_phy = phy != &dev->phy;
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u32 reg = MT_WF_PHY_R0_PHYMUX_5(ext_phy);
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u32 reg;
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if (is_mt7663(&dev->mt76))
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reg = MT7663_WF_PHY_R0_PHYMUX_5;
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else
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reg = MT_WF_PHY_R0_PHYMUX_5(ext_phy);
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/* reset PD and MDRDY counters */
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mt76_clear(dev, reg, GENMASK(22, 20));
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mt76_set(dev, reg, BIT(22) | BIT(20));
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}
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@ -151,6 +151,7 @@ enum mt7615_reg_base {
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#define MT_WF_PHY_WF2_RFCTRL0_LPBCN_EN BIT(9)
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#define MT_WF_PHY_R0_PHYMUX_5(_phy) MT_WF_PHY(0x0614 + ((_phy) << 9))
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#define MT7663_WF_PHY_R0_PHYMUX_5 MT_WF_PHY(0x0414)
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#define MT_WF_PHY_R0_PHYCTRL_STS0(_phy) MT_WF_PHY(0x020c + ((_phy) << 9))
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#define MT_WF_PHYCTRL_STAT_PD_OFDM GENMASK(31, 16)
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