diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c index bba051d9f21d..a3cf74a00b3f 100644 --- a/drivers/gpu/drm/i915/i915_drv.c +++ b/drivers/gpu/drm/i915/i915_drv.c @@ -1242,15 +1242,15 @@ skl_get_dram_info(struct drm_i915_private *dev_priv) static int bxt_get_dimm_size(u32 val) { switch (val & BXT_DRAM_SIZE_MASK) { - case BXT_DRAM_SIZE_4GB: + case BXT_DRAM_SIZE_4GBIT: return 4; - case BXT_DRAM_SIZE_6GB: + case BXT_DRAM_SIZE_6GBIT: return 6; - case BXT_DRAM_SIZE_8GB: + case BXT_DRAM_SIZE_8GBIT: return 8; - case BXT_DRAM_SIZE_12GB: + case BXT_DRAM_SIZE_12GBIT: return 12; - case BXT_DRAM_SIZE_16GB: + case BXT_DRAM_SIZE_16GBIT: return 16; default: MISSING_CASE(val); @@ -1287,9 +1287,14 @@ static int bxt_get_dimm_ranks(u32 val) static void bxt_get_dimm_info(struct dram_dimm_info *dimm, u32 val) { - dimm->size = bxt_get_dimm_size(val); dimm->width = bxt_get_dimm_width(val); dimm->ranks = bxt_get_dimm_ranks(val); + + /* + * Size in register is Gb per DRAM device. Convert to total + * GB to match the way we report this for non-LP platforms. + */ + dimm->size = bxt_get_dimm_size(val) * intel_dimm_num_devices(dimm) / 8; } static int diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h index 16ce9c609c65..75236b4f0daf 100644 --- a/drivers/gpu/drm/i915/i915_reg.h +++ b/drivers/gpu/drm/i915/i915_reg.h @@ -9856,11 +9856,11 @@ enum skl_power_gate { #define BXT_DRAM_WIDTH_X64 (0x3 << 4) #define BXT_DRAM_SIZE_MASK (0x7 << 6) #define BXT_DRAM_SIZE_SHIFT 6 -#define BXT_DRAM_SIZE_4GB (0x0 << 6) -#define BXT_DRAM_SIZE_6GB (0x1 << 6) -#define BXT_DRAM_SIZE_8GB (0x2 << 6) -#define BXT_DRAM_SIZE_12GB (0x3 << 6) -#define BXT_DRAM_SIZE_16GB (0x4 << 6) +#define BXT_DRAM_SIZE_4GBIT (0x0 << 6) +#define BXT_DRAM_SIZE_6GBIT (0x1 << 6) +#define BXT_DRAM_SIZE_8GBIT (0x2 << 6) +#define BXT_DRAM_SIZE_12GBIT (0x3 << 6) +#define BXT_DRAM_SIZE_16GBIT (0x4 << 6) #define SKL_MEMORY_FREQ_MULTIPLIER_HZ 266666666 #define SKL_MC_BIOS_DATA_0_0_0_MCHBAR_PCU _MMIO(MCHBAR_MIRROR_BASE_SNB + 0x5E04)