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dt-bindings: thermal: imx8mm-thermal: Document optional nvmem-cells 

The TMU TASR, TCALIVn, TRIM registers must be explicitly programmed with
calibration values from OCOTP. Document optional phandle to OCOTP nvmem
provider.

Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Marek Vasut <marex@denx.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@kernel.org>
This commit is contained in:
Marek Vasut 2022-12-02 17:23:49 +01:00 committed by Daniel Lezcano
parent 89992d95ed
commit 8848c0d7a0
1 changed files with 7 additions and 0 deletions
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Documentation/devicetree/bindings/thermal/imx8mm-thermal.yaml
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@ -32,6 +32,13 @@ properties:
clocks: clocks:
maxItems: 1 maxItems: 1
nvmem-cells:
maxItems: 1
description: Phandle to the calibration data provided by ocotp
nvmem-cell-names:
const: calib
"#thermal-sensor-cells": "#thermal-sensor-cells":
description: | description: |
Number of cells required to uniquely identify the thermal Number of cells required to uniquely identify the thermal