[PATCH] m68k: wd33c93: extra delay
The wd33c93 needs a small delay before a new command can be started. Signed-off-by: Roman Zippel <zippel@linux-m68k.org> Cc: James Bottomley <James.Bottomley@steeleye.com> Signed-off-by: Andrew Morton <akpm@osdl.org> Signed-off-by: Linus Torvalds <torvalds@osdl.org>
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@ -939,6 +939,7 @@ wd33c93_intr(struct Scsi_Host *instance)
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DB(DB_INTR, printk("%02x", cmd->SCp.Status))
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if (hostdata->level2 >= L2_BASIC) {
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sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear interrupt */
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udelay(7);
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hostdata->state = S_RUNNING_LEVEL2;
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write_wd33c93(regs, WD_COMMAND_PHASE, 0x50);
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write_wd33c93_cmd(regs, WD_CMD_SEL_ATN_XFER);
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@ -955,6 +956,7 @@ wd33c93_intr(struct Scsi_Host *instance)
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msg = read_1_byte(regs);
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sr = read_wd33c93(regs, WD_SCSI_STATUS); /* clear interrupt */
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udelay(7);
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hostdata->incoming_msg[hostdata->incoming_ptr] = msg;
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if (hostdata->incoming_msg[0] == EXTENDED_MESSAGE)
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@ -1358,6 +1360,7 @@ wd33c93_intr(struct Scsi_Host *instance)
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} else {
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/* Verify this is a change to MSG_IN and read the message */
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sr = read_wd33c93(regs, WD_SCSI_STATUS);
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udelay(7);
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if (sr == (CSR_ABORT | PHS_MESS_IN) ||
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sr == (CSR_UNEXP | PHS_MESS_IN) ||
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sr == (CSR_SRV_REQ | PHS_MESS_IN)) {
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@ -1374,6 +1377,7 @@ wd33c93_intr(struct Scsi_Host *instance)
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asr);
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}
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sr = read_wd33c93(regs, WD_SCSI_STATUS);
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udelay(7);
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if (sr != CSR_MSGIN)
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printk
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("wd33c93: Not paused with ACK on RESEL (%02x)\n",
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