qed: QL41xxx VF MSI-x table
The QL41xxx adapters' PCI allows a single configuration for the MSI-x table size of all child VFs of a given PF. The existing code wouldn't cause the management firmware to set that value, meaning the VFs would retain the default MSI-x table size. Introduce a new scheme so that whenever a VF is enabled, driver would set the number of MSI-x to be the maximum over the various VFs' needs. Signed-off-by: Yuval Mintz <Yuval.Mintz@cavium.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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38b23e43ee
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@ -11477,6 +11477,7 @@ struct public_drv_mb {
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#define DRV_MSG_CODE_INITIATE_PF_FLR 0x02010000
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#define DRV_MSG_CODE_VF_DISABLED_DONE 0xc0000000
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#define DRV_MSG_CODE_CFG_VF_MSIX 0xc0010000
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#define DRV_MSG_CODE_CFG_PF_VFS_MSIX 0xc0020000
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#define DRV_MSG_CODE_NVM_GET_FILE_ATT 0x00030000
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#define DRV_MSG_CODE_NVM_READ_NVRAM 0x00050000
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#define DRV_MSG_CODE_MCP_RESET 0x00090000
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@ -11640,7 +11641,7 @@ struct public_drv_mb {
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#define FW_MSG_CODE_OS_WOL_SUPPORTED 0x00800000
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#define FW_MSG_CODE_OS_WOL_NOT_SUPPORTED 0x00810000
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#define FW_MSG_CODE_DRV_CFG_PF_VFS_MSIX_DONE 0x00870000
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#define FW_MSG_SEQ_NUMBER_MASK 0x0000ffff
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u32 fw_mb_param;
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@ -1801,8 +1801,9 @@ int qed_mcp_get_flash_size(struct qed_hwfn *p_hwfn,
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return 0;
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}
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int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt, u8 vf_id, u8 num)
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static int
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qed_mcp_config_vf_msix_bb(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt, u8 vf_id, u8 num)
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{
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u32 resp = 0, param = 0, rc_param = 0;
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int rc;
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@ -1832,6 +1833,36 @@ int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
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return rc;
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}
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static int
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qed_mcp_config_vf_msix_ah(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt, u8 num)
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{
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u32 resp = 0, param = num, rc_param = 0;
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int rc;
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rc = qed_mcp_cmd(p_hwfn, p_ptt, DRV_MSG_CODE_CFG_PF_VFS_MSIX,
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param, &resp, &rc_param);
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if (resp != FW_MSG_CODE_DRV_CFG_PF_VFS_MSIX_DONE) {
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DP_NOTICE(p_hwfn, "MFW failed to set MSI-X for VFs\n");
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rc = -EINVAL;
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} else {
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DP_VERBOSE(p_hwfn, QED_MSG_IOV,
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"Requested 0x%02x MSI-x interrupts for VFs\n", num);
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}
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return rc;
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}
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int qed_mcp_config_vf_msix(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt, u8 vf_id, u8 num)
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{
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if (QED_IS_BB(p_hwfn->cdev))
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return qed_mcp_config_vf_msix_bb(p_hwfn, p_ptt, vf_id, num);
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else
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return qed_mcp_config_vf_msix_ah(p_hwfn, p_ptt, num);
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}
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int
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qed_mcp_send_drv_version(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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@ -747,6 +747,35 @@ static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
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qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
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}
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static int
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qed_iov_enable_vf_access_msix(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt, u8 abs_vf_id, u8 num_sbs)
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{
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u8 current_max = 0;
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int i;
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/* For AH onward, configuration is per-PF. Find maximum of all
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* the currently enabled child VFs, and set the number to be that.
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*/
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if (!QED_IS_BB(p_hwfn->cdev)) {
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qed_for_each_vf(p_hwfn, i) {
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struct qed_vf_info *p_vf;
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p_vf = qed_iov_get_vf_info(p_hwfn, (u16)i, true);
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if (!p_vf)
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continue;
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current_max = max_t(u8, current_max, p_vf->num_sbs);
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}
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}
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if (num_sbs > current_max)
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return qed_mcp_config_vf_msix(p_hwfn, p_ptt,
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abs_vf_id, num_sbs);
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return 0;
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}
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static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
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struct qed_ptt *p_ptt,
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struct qed_vf_info *vf)
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@ -771,7 +800,8 @@ static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
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qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
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rc = qed_mcp_config_vf_msix(p_hwfn, p_ptt, vf->abs_vf_id, vf->num_sbs);
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rc = qed_iov_enable_vf_access_msix(p_hwfn, p_ptt,
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vf->abs_vf_id, vf->num_sbs);
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if (rc)
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return rc;
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