drm/amdgpu: move vram usage by vbios to mman (v2)
It's related to the memory manager so move it there. v2: inline the structure Reviewed-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -651,16 +651,6 @@ struct amdgpu_atcs {
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struct amdgpu_atcs_functions functions;
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struct amdgpu_atcs_functions functions;
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};
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};
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/*
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* Firmware VRAM reservation
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*/
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struct amdgpu_fw_vram_usage {
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u64 start_offset;
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u64 size;
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struct amdgpu_bo *reserved_bo;
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void *va;
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};
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/*
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/*
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* CGS
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* CGS
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*/
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*/
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@ -944,8 +934,6 @@ struct amdgpu_device {
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struct delayed_work delayed_init_work;
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struct delayed_work delayed_init_work;
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struct amdgpu_virt virt;
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struct amdgpu_virt virt;
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/* firmware VRAM reservation */
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struct amdgpu_fw_vram_usage fw_vram_usage;
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/* link all shadow bo */
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/* link all shadow bo */
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struct list_head shadow_list;
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struct list_head shadow_list;
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@ -1786,9 +1786,9 @@ static int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev)
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(uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION <<
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(uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION <<
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ATOM_VRAM_OPERATION_FLAGS_SHIFT)) {
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ATOM_VRAM_OPERATION_FLAGS_SHIFT)) {
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/* Firmware request VRAM reservation for SR-IOV */
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/* Firmware request VRAM reservation for SR-IOV */
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adev->fw_vram_usage.start_offset = (start_addr &
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adev->mman.fw_vram_usage_start_offset = (start_addr &
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(~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10;
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(~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10;
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adev->fw_vram_usage.size = size << 10;
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adev->mman.fw_vram_usage_size = size << 10;
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/* Use the default scratch size */
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/* Use the default scratch size */
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usage_bytes = 0;
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usage_bytes = 0;
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} else {
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} else {
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@ -89,9 +89,9 @@ int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev)
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(uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION <<
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(uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION <<
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ATOM_VRAM_OPERATION_FLAGS_SHIFT)) {
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ATOM_VRAM_OPERATION_FLAGS_SHIFT)) {
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/* Firmware request VRAM reservation for SR-IOV */
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/* Firmware request VRAM reservation for SR-IOV */
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adev->fw_vram_usage.start_offset = (start_addr &
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adev->mman.fw_vram_usage_start_offset = (start_addr &
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(~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10;
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(~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10;
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adev->fw_vram_usage.size = size << 10;
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adev->mman.fw_vram_usage_size = size << 10;
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/* Use the default scratch size */
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/* Use the default scratch size */
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usage_bytes = 0;
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usage_bytes = 0;
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} else {
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} else {
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@ -1766,8 +1766,8 @@ static struct ttm_bo_driver amdgpu_bo_driver = {
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*/
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*/
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static void amdgpu_ttm_fw_reserve_vram_fini(struct amdgpu_device *adev)
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static void amdgpu_ttm_fw_reserve_vram_fini(struct amdgpu_device *adev)
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{
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{
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amdgpu_bo_free_kernel(&adev->fw_vram_usage.reserved_bo,
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amdgpu_bo_free_kernel(&adev->mman.fw_vram_usage_reserved_bo,
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NULL, &adev->fw_vram_usage.va);
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NULL, &adev->mman.fw_vram_usage_va);
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}
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}
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/**
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/**
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@ -1781,19 +1781,19 @@ static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev)
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{
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{
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uint64_t vram_size = adev->gmc.visible_vram_size;
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uint64_t vram_size = adev->gmc.visible_vram_size;
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adev->fw_vram_usage.va = NULL;
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adev->mman.fw_vram_usage_va = NULL;
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adev->fw_vram_usage.reserved_bo = NULL;
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adev->mman.fw_vram_usage_reserved_bo = NULL;
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if (adev->fw_vram_usage.size == 0 ||
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if (adev->mman.fw_vram_usage_size == 0 ||
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adev->fw_vram_usage.size > vram_size)
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adev->mman.fw_vram_usage_size > vram_size)
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return 0;
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return 0;
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return amdgpu_bo_create_kernel_at(adev,
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return amdgpu_bo_create_kernel_at(adev,
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adev->fw_vram_usage.start_offset,
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adev->mman.fw_vram_usage_start_offset,
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adev->fw_vram_usage.size,
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adev->mman.fw_vram_usage_size,
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AMDGPU_GEM_DOMAIN_VRAM,
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AMDGPU_GEM_DOMAIN_VRAM,
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&adev->fw_vram_usage.reserved_bo,
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&adev->mman.fw_vram_usage_reserved_bo,
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&adev->fw_vram_usage.va);
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&adev->mman.fw_vram_usage_va);
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}
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}
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/*
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/*
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@ -70,6 +70,12 @@ struct amdgpu_mman {
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uint8_t *discovery_bin;
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uint8_t *discovery_bin;
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uint32_t discovery_tmr_size;
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uint32_t discovery_tmr_size;
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struct amdgpu_bo *discovery_memory;
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struct amdgpu_bo *discovery_memory;
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/* firmware VRAM reservation */
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u64 fw_vram_usage_start_offset;
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u64 fw_vram_usage_size;
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struct amdgpu_bo *fw_vram_usage_reserved_bo;
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void *fw_vram_usage_va;
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};
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};
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struct amdgpu_copy_mem {
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struct amdgpu_copy_mem {
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@ -401,7 +401,7 @@ static void amdgpu_virt_add_bad_page(struct amdgpu_device *adev,
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if (bp_block_size) {
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if (bp_block_size) {
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bp_cnt = bp_block_size / sizeof(uint64_t);
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bp_cnt = bp_block_size / sizeof(uint64_t);
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for (bp_idx = 0; bp_idx < bp_cnt; bp_idx++) {
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for (bp_idx = 0; bp_idx < bp_cnt; bp_idx++) {
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retired_page = *(uint64_t *)(adev->fw_vram_usage.va +
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retired_page = *(uint64_t *)(adev->mman.fw_vram_usage_va +
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bp_block_offset + bp_idx * sizeof(uint64_t));
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bp_block_offset + bp_idx * sizeof(uint64_t));
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bp.retired_page = retired_page;
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bp.retired_page = retired_page;
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@ -428,10 +428,10 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev)
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adev->virt.fw_reserve.p_pf2vf = NULL;
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adev->virt.fw_reserve.p_pf2vf = NULL;
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adev->virt.fw_reserve.p_vf2pf = NULL;
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adev->virt.fw_reserve.p_vf2pf = NULL;
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if (adev->fw_vram_usage.va != NULL) {
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if (adev->mman.fw_vram_usage_va != NULL) {
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adev->virt.fw_reserve.p_pf2vf =
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adev->virt.fw_reserve.p_pf2vf =
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(struct amd_sriov_msg_pf2vf_info_header *)(
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(struct amd_sriov_msg_pf2vf_info_header *)(
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adev->fw_vram_usage.va + AMDGIM_DATAEXCHANGE_OFFSET);
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adev->mman.fw_vram_usage_va + AMDGIM_DATAEXCHANGE_OFFSET);
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AMDGPU_FW_VRAM_PF2VF_READ(adev, header.size, &pf2vf_size);
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AMDGPU_FW_VRAM_PF2VF_READ(adev, header.size, &pf2vf_size);
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AMDGPU_FW_VRAM_PF2VF_READ(adev, checksum, &checksum);
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AMDGPU_FW_VRAM_PF2VF_READ(adev, checksum, &checksum);
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AMDGPU_FW_VRAM_PF2VF_READ(adev, feature_flags, &adev->virt.gim_feature);
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AMDGPU_FW_VRAM_PF2VF_READ(adev, feature_flags, &adev->virt.gim_feature);
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