drm/amdgpu: move vram usage by vbios to mman (v2)

It's related to the memory manager so move it there.

v2: inline the structure

Reviewed-by: Christian König <christian.koenig@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Alex Deucher 2020-07-29 13:14:17 -04:00
parent 72de33f8f7
commit 87ded5caee
6 changed files with 23 additions and 29 deletions

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@ -651,16 +651,6 @@ struct amdgpu_atcs {
struct amdgpu_atcs_functions functions; struct amdgpu_atcs_functions functions;
}; };
/*
* Firmware VRAM reservation
*/
struct amdgpu_fw_vram_usage {
u64 start_offset;
u64 size;
struct amdgpu_bo *reserved_bo;
void *va;
};
/* /*
* CGS * CGS
*/ */
@ -944,8 +934,6 @@ struct amdgpu_device {
struct delayed_work delayed_init_work; struct delayed_work delayed_init_work;
struct amdgpu_virt virt; struct amdgpu_virt virt;
/* firmware VRAM reservation */
struct amdgpu_fw_vram_usage fw_vram_usage;
/* link all shadow bo */ /* link all shadow bo */
struct list_head shadow_list; struct list_head shadow_list;

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@ -1786,9 +1786,9 @@ static int amdgpu_atombios_allocate_fb_scratch(struct amdgpu_device *adev)
(uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION << (uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION <<
ATOM_VRAM_OPERATION_FLAGS_SHIFT)) { ATOM_VRAM_OPERATION_FLAGS_SHIFT)) {
/* Firmware request VRAM reservation for SR-IOV */ /* Firmware request VRAM reservation for SR-IOV */
adev->fw_vram_usage.start_offset = (start_addr & adev->mman.fw_vram_usage_start_offset = (start_addr &
(~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10; (~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10;
adev->fw_vram_usage.size = size << 10; adev->mman.fw_vram_usage_size = size << 10;
/* Use the default scratch size */ /* Use the default scratch size */
usage_bytes = 0; usage_bytes = 0;
} else { } else {

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@ -89,9 +89,9 @@ int amdgpu_atomfirmware_allocate_fb_scratch(struct amdgpu_device *adev)
(uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION << (uint32_t)(ATOM_VRAM_BLOCK_SRIOV_MSG_SHARE_RESERVATION <<
ATOM_VRAM_OPERATION_FLAGS_SHIFT)) { ATOM_VRAM_OPERATION_FLAGS_SHIFT)) {
/* Firmware request VRAM reservation for SR-IOV */ /* Firmware request VRAM reservation for SR-IOV */
adev->fw_vram_usage.start_offset = (start_addr & adev->mman.fw_vram_usage_start_offset = (start_addr &
(~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10; (~ATOM_VRAM_OPERATION_FLAGS_MASK)) << 10;
adev->fw_vram_usage.size = size << 10; adev->mman.fw_vram_usage_size = size << 10;
/* Use the default scratch size */ /* Use the default scratch size */
usage_bytes = 0; usage_bytes = 0;
} else { } else {

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@ -1766,8 +1766,8 @@ static struct ttm_bo_driver amdgpu_bo_driver = {
*/ */
static void amdgpu_ttm_fw_reserve_vram_fini(struct amdgpu_device *adev) static void amdgpu_ttm_fw_reserve_vram_fini(struct amdgpu_device *adev)
{ {
amdgpu_bo_free_kernel(&adev->fw_vram_usage.reserved_bo, amdgpu_bo_free_kernel(&adev->mman.fw_vram_usage_reserved_bo,
NULL, &adev->fw_vram_usage.va); NULL, &adev->mman.fw_vram_usage_va);
} }
/** /**
@ -1781,19 +1781,19 @@ static int amdgpu_ttm_fw_reserve_vram_init(struct amdgpu_device *adev)
{ {
uint64_t vram_size = adev->gmc.visible_vram_size; uint64_t vram_size = adev->gmc.visible_vram_size;
adev->fw_vram_usage.va = NULL; adev->mman.fw_vram_usage_va = NULL;
adev->fw_vram_usage.reserved_bo = NULL; adev->mman.fw_vram_usage_reserved_bo = NULL;
if (adev->fw_vram_usage.size == 0 || if (adev->mman.fw_vram_usage_size == 0 ||
adev->fw_vram_usage.size > vram_size) adev->mman.fw_vram_usage_size > vram_size)
return 0; return 0;
return amdgpu_bo_create_kernel_at(adev, return amdgpu_bo_create_kernel_at(adev,
adev->fw_vram_usage.start_offset, adev->mman.fw_vram_usage_start_offset,
adev->fw_vram_usage.size, adev->mman.fw_vram_usage_size,
AMDGPU_GEM_DOMAIN_VRAM, AMDGPU_GEM_DOMAIN_VRAM,
&adev->fw_vram_usage.reserved_bo, &adev->mman.fw_vram_usage_reserved_bo,
&adev->fw_vram_usage.va); &adev->mman.fw_vram_usage_va);
} }
/* /*

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@ -70,6 +70,12 @@ struct amdgpu_mman {
uint8_t *discovery_bin; uint8_t *discovery_bin;
uint32_t discovery_tmr_size; uint32_t discovery_tmr_size;
struct amdgpu_bo *discovery_memory; struct amdgpu_bo *discovery_memory;
/* firmware VRAM reservation */
u64 fw_vram_usage_start_offset;
u64 fw_vram_usage_size;
struct amdgpu_bo *fw_vram_usage_reserved_bo;
void *fw_vram_usage_va;
}; };
struct amdgpu_copy_mem { struct amdgpu_copy_mem {

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@ -401,7 +401,7 @@ static void amdgpu_virt_add_bad_page(struct amdgpu_device *adev,
if (bp_block_size) { if (bp_block_size) {
bp_cnt = bp_block_size / sizeof(uint64_t); bp_cnt = bp_block_size / sizeof(uint64_t);
for (bp_idx = 0; bp_idx < bp_cnt; bp_idx++) { for (bp_idx = 0; bp_idx < bp_cnt; bp_idx++) {
retired_page = *(uint64_t *)(adev->fw_vram_usage.va + retired_page = *(uint64_t *)(adev->mman.fw_vram_usage_va +
bp_block_offset + bp_idx * sizeof(uint64_t)); bp_block_offset + bp_idx * sizeof(uint64_t));
bp.retired_page = retired_page; bp.retired_page = retired_page;
@ -428,10 +428,10 @@ void amdgpu_virt_init_data_exchange(struct amdgpu_device *adev)
adev->virt.fw_reserve.p_pf2vf = NULL; adev->virt.fw_reserve.p_pf2vf = NULL;
adev->virt.fw_reserve.p_vf2pf = NULL; adev->virt.fw_reserve.p_vf2pf = NULL;
if (adev->fw_vram_usage.va != NULL) { if (adev->mman.fw_vram_usage_va != NULL) {
adev->virt.fw_reserve.p_pf2vf = adev->virt.fw_reserve.p_pf2vf =
(struct amd_sriov_msg_pf2vf_info_header *)( (struct amd_sriov_msg_pf2vf_info_header *)(
adev->fw_vram_usage.va + AMDGIM_DATAEXCHANGE_OFFSET); adev->mman.fw_vram_usage_va + AMDGIM_DATAEXCHANGE_OFFSET);
AMDGPU_FW_VRAM_PF2VF_READ(adev, header.size, &pf2vf_size); AMDGPU_FW_VRAM_PF2VF_READ(adev, header.size, &pf2vf_size);
AMDGPU_FW_VRAM_PF2VF_READ(adev, checksum, &checksum); AMDGPU_FW_VRAM_PF2VF_READ(adev, checksum, &checksum);
AMDGPU_FW_VRAM_PF2VF_READ(adev, feature_flags, &adev->virt.gim_feature); AMDGPU_FW_VRAM_PF2VF_READ(adev, feature_flags, &adev->virt.gim_feature);