m68k: Fix asm register constraints for atomic ops
Depending on register assignment by the compiler: {standard input}:3084: Error: operands mismatch -- statement `andl %a1,%d1' ignored {standard input}:3145: Error: operands mismatch -- statement `orl %a1,%d1' ignored {standard input}:3195: Error: operands mismatch -- statement `eorl %a1,%d1' ignored Indeed, the first operand must not be an address register. However, it can be an immediate value. Fix this by adjusting the register constraint from "g" (general purpose register) to "di" (data register or immediate). Fixes:e39d88ea3c
("locking/atomic, arch/m68k: Implement atomic_fetch_{add,sub,and,or,xor}()") Fixes:d839bae426
("locking,arch,m68k: Fold atomic_ops") Fixes:1da177e4c3
("Linux-2.6.12-rc2") Reported-by: kernel test robot <lkp@intel.com> Reported-by: Arnd Bergmann <arnd@arndb.de> Reported-by: Alexander Viro <viro@zeniv.linux.org.uk> Signed-off-by: Geert Uytterhoeven <geert@linux-m68k.org> Tested-by: Arnd Bergmann <arnd@arndb.de> Link: https://lore.kernel.org/r/20210809112903.3898660-1-geert@linux-m68k.org
This commit is contained in:
parent
2189e928b6
commit
87d93029fe
|
@ -48,7 +48,7 @@ static inline int arch_atomic_##op##_return(int i, atomic_t *v) \
|
|||
" casl %2,%1,%0\n" \
|
||||
" jne 1b" \
|
||||
: "+m" (*v), "=&d" (t), "=&d" (tmp) \
|
||||
: "g" (i), "2" (arch_atomic_read(v))); \
|
||||
: "di" (i), "2" (arch_atomic_read(v))); \
|
||||
return t; \
|
||||
}
|
||||
|
||||
|
@ -63,7 +63,7 @@ static inline int arch_atomic_fetch_##op(int i, atomic_t *v) \
|
|||
" casl %2,%1,%0\n" \
|
||||
" jne 1b" \
|
||||
: "+m" (*v), "=&d" (t), "=&d" (tmp) \
|
||||
: "g" (i), "2" (arch_atomic_read(v))); \
|
||||
: "di" (i), "2" (arch_atomic_read(v))); \
|
||||
return tmp; \
|
||||
}
|
||||
|
||||
|
|
Loading…
Reference in New Issue