ASoC: cs35l41: Set the max SPI speed for the whole device
Higher speeds are only supported when PLL is enabled, but the current driver doesn't enable PLL outside of stream use cases, so better to set the lowest SPI speed accepted by the entire device. Move the current frequency set to the spi sub-driver so the whole device can benefit from that speed. spi-max-frequency property could be used, but ACPI systems don't support it, so by setting it in the spi sub-driver probe both Device Trees and ACPI systems are supported. Signed-off-by: Lucas Tanure <tanureal@opensource.cirrus.com> Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com> Link: https://lore.kernel.org/r/20211123163149.1530535-2-tanureal@opensource.cirrus.com Signed-off-by: Mark Brown <broonie@kernel.org>
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@ -42,34 +42,6 @@ static const struct spi_device_id cs35l41_id_spi[] = {
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MODULE_DEVICE_TABLE(spi, cs35l41_id_spi);
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static void cs35l41_spi_otp_setup(struct cs35l41_private *cs35l41,
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bool is_pre_setup, unsigned int *freq)
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{
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struct spi_device *spi;
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u32 orig_spi_freq;
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spi = to_spi_device(cs35l41->dev);
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if (!spi) {
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dev_err(cs35l41->dev, "%s: No SPI device\n", __func__);
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return;
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}
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if (is_pre_setup) {
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orig_spi_freq = spi->max_speed_hz;
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if (orig_spi_freq > CS35L41_SPI_MAX_FREQ_OTP) {
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spi->max_speed_hz = CS35L41_SPI_MAX_FREQ_OTP;
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spi_setup(spi);
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}
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*freq = orig_spi_freq;
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} else {
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if (spi->max_speed_hz != *freq) {
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spi->max_speed_hz = *freq;
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spi_setup(spi);
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}
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}
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}
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static int cs35l41_spi_probe(struct spi_device *spi)
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{
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const struct regmap_config *regmap_config = &cs35l41_regmap_spi;
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@ -81,6 +53,9 @@ static int cs35l41_spi_probe(struct spi_device *spi)
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if (!cs35l41)
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return -ENOMEM;
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spi->max_speed_hz = CS35L41_SPI_MAX_FREQ;
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spi_setup(spi);
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spi_set_drvdata(spi, cs35l41);
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cs35l41->regmap = devm_regmap_init_spi(spi, regmap_config);
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if (IS_ERR(cs35l41->regmap)) {
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@ -91,7 +66,6 @@ static int cs35l41_spi_probe(struct spi_device *spi)
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cs35l41->dev = &spi->dev;
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cs35l41->irq = spi->irq;
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cs35l41->otp_setup = cs35l41_spi_otp_setup;
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return cs35l41_probe(cs35l41, pdata);
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}
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@ -302,7 +302,6 @@ static int cs35l41_otp_unpack(void *data)
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const struct cs35l41_otp_packed_element_t *otp_map;
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struct cs35l41_private *cs35l41 = data;
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int bit_offset, word_offset, ret, i;
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unsigned int orig_spi_freq;
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unsigned int bit_sum = 8;
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u32 otp_val, otp_id_reg;
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u32 *otp_mem;
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@ -326,9 +325,6 @@ static int cs35l41_otp_unpack(void *data)
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goto err_otp_unpack;
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}
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if (cs35l41->otp_setup)
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cs35l41->otp_setup(cs35l41, true, &orig_spi_freq);
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ret = regmap_bulk_read(cs35l41->regmap, CS35L41_OTP_MEM0, otp_mem,
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CS35L41_OTP_SIZE_WORDS);
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if (ret < 0) {
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@ -336,9 +332,6 @@ static int cs35l41_otp_unpack(void *data)
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goto err_otp_unpack;
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}
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if (cs35l41->otp_setup)
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cs35l41->otp_setup(cs35l41, false, &orig_spi_freq);
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otp_map = otp_map_match->map;
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bit_offset = otp_map_match->bit_offset;
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@ -726,7 +726,7 @@
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#define CS35L41_FS2_WINDOW_MASK 0x00FFF800
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#define CS35L41_FS2_WINDOW_SHIFT 12
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#define CS35L41_SPI_MAX_FREQ_OTP 4000000
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#define CS35L41_SPI_MAX_FREQ 4000000
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#define CS35L41_RX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
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#define CS35L41_TX_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | SNDRV_PCM_FMTBIT_S24_LE)
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@ -764,8 +764,6 @@ struct cs35l41_private {
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int irq;
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/* GPIO for /RST */
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struct gpio_desc *reset_gpio;
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void (*otp_setup)(struct cs35l41_private *cs35l41, bool is_pre_setup,
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unsigned int *freq);
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};
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int cs35l41_probe(struct cs35l41_private *cs35l41,
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