gpio: sch: Fix Oops on module load on Asus Eee PC 1201
This fixes the issue descirbe in bug 117531 (https://bugzilla.kernel.org/show_bug.cgi?id=117531). It's a regression introduced in linux 4.5 that causes a Oops at load of gpio_sch and prevents powering off the computer. The issue is that sch_gpio_reg_set is called in sch_gpio_probe before gpio_chip data is initialized with the pointer to the sch_gpio struct. As sch_gpio_reg_set calls gpiochip_get_data, it returns NULL which causes the Oops. The patch follows Mika's advice (https://lkml.org/lkml/2016/5/9/61) and consists in modifying sch_gpio_reg_get and sch_gpio_reg_set to take a sch_gpio struct directly instead of a gpio_chip, which avoids the call to gpiochip_get_data. Thanks Mika for your patience with me :-) Cc: stable@vger.kernel.org Signed-off-by: Colin Pitrat <colin.pitrat@gmail.com> Acked-by: Alexandre Courbot <acourbot@nvidia.com> Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -61,9 +61,8 @@ static unsigned sch_gpio_bit(struct sch_gpio *sch, unsigned gpio)
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return gpio % 8;
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}
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static int sch_gpio_reg_get(struct gpio_chip *gc, unsigned gpio, unsigned reg)
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static int sch_gpio_reg_get(struct sch_gpio *sch, unsigned gpio, unsigned reg)
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{
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struct sch_gpio *sch = gpiochip_get_data(gc);
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unsigned short offset, bit;
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u8 reg_val;
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@ -75,10 +74,9 @@ static int sch_gpio_reg_get(struct gpio_chip *gc, unsigned gpio, unsigned reg)
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return reg_val;
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}
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static void sch_gpio_reg_set(struct gpio_chip *gc, unsigned gpio, unsigned reg,
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static void sch_gpio_reg_set(struct sch_gpio *sch, unsigned gpio, unsigned reg,
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int val)
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{
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struct sch_gpio *sch = gpiochip_get_data(gc);
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unsigned short offset, bit;
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u8 reg_val;
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@ -98,14 +96,15 @@ static int sch_gpio_direction_in(struct gpio_chip *gc, unsigned gpio_num)
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struct sch_gpio *sch = gpiochip_get_data(gc);
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spin_lock(&sch->lock);
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sch_gpio_reg_set(gc, gpio_num, GIO, 1);
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sch_gpio_reg_set(sch, gpio_num, GIO, 1);
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spin_unlock(&sch->lock);
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return 0;
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}
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static int sch_gpio_get(struct gpio_chip *gc, unsigned gpio_num)
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{
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return sch_gpio_reg_get(gc, gpio_num, GLV);
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struct sch_gpio *sch = gpiochip_get_data(gc);
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return sch_gpio_reg_get(sch, gpio_num, GLV);
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}
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static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val)
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@ -113,7 +112,7 @@ static void sch_gpio_set(struct gpio_chip *gc, unsigned gpio_num, int val)
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struct sch_gpio *sch = gpiochip_get_data(gc);
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spin_lock(&sch->lock);
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sch_gpio_reg_set(gc, gpio_num, GLV, val);
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sch_gpio_reg_set(sch, gpio_num, GLV, val);
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spin_unlock(&sch->lock);
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}
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@ -123,7 +122,7 @@ static int sch_gpio_direction_out(struct gpio_chip *gc, unsigned gpio_num,
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struct sch_gpio *sch = gpiochip_get_data(gc);
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spin_lock(&sch->lock);
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sch_gpio_reg_set(gc, gpio_num, GIO, 0);
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sch_gpio_reg_set(sch, gpio_num, GIO, 0);
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spin_unlock(&sch->lock);
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/*
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@ -182,13 +181,13 @@ static int sch_gpio_probe(struct platform_device *pdev)
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* GPIO7 is configured by the CMC as SLPIOVR
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* Enable GPIO[9:8] core powered gpios explicitly
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*/
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sch_gpio_reg_set(&sch->chip, 8, GEN, 1);
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sch_gpio_reg_set(&sch->chip, 9, GEN, 1);
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sch_gpio_reg_set(sch, 8, GEN, 1);
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sch_gpio_reg_set(sch, 9, GEN, 1);
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/*
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* SUS_GPIO[2:0] enabled by default
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* Enable SUS_GPIO3 resume powered gpio explicitly
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*/
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sch_gpio_reg_set(&sch->chip, 13, GEN, 1);
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sch_gpio_reg_set(sch, 13, GEN, 1);
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break;
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case PCI_DEVICE_ID_INTEL_ITC_LPC:
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