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ARM: shmobile: r8a7779: Route all interrupts to ARM 

Without this, the interrupts for I2C, VIN, GPIO, SDHC, HSCIF and
HPB-DMAC are sent to the SH processor.

Signed-off-by: Phil Edworthy <phil.edworthy@renesas.com>
Acked-by: Magnus Damm <damm@opensource.se>
Signed-off-by: Rafael J. Wysocki <rjw@sisk.pl>
This commit is contained in:
Phil Edworthy 2012-06-23 01:12:09 +02:00 committed by Rafael J. Wysocki
parent c207d2df1c
commit 86f887c105
1 changed files with 7 additions and 0 deletions
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7
arch/arm/mach-shmobile/intc-r8a7779.c
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@ -35,6 +35,9 @@
#define INT2SMSKCR3 0xfe7822ac #define INT2SMSKCR3 0xfe7822ac
#define INT2SMSKCR4 0xfe7822b0 #define INT2SMSKCR4 0xfe7822b0
#define INT2NTSR0 0xfe700060
#define INT2NTSR1 0xfe700064
static int r8a7779_set_wake(struct irq_data *data, unsigned int on) static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
{ {
return 0; /* always allow wakeup */ return 0; /* always allow wakeup */
@ -49,6 +52,10 @@ void __init r8a7779_init_irq(void)
gic_init(0, 29, gic_dist_base, gic_cpu_base); gic_init(0, 29, gic_dist_base, gic_cpu_base);
gic_arch_extn.irq_set_wake = r8a7779_set_wake; gic_arch_extn.irq_set_wake = r8a7779_set_wake;
/* route all interrupts to ARM */
__raw_writel(0xffffffff, INT2NTSR0);
__raw_writel(0x3fffffff, INT2NTSR1);
/* unmask all known interrupts in INTCS2 */ /* unmask all known interrupts in INTCS2 */
__raw_writel(0xfffffff0, INT2SMSKCR0); __raw_writel(0xfffffff0, INT2SMSKCR0);
__raw_writel(0xfff7ffff, INT2SMSKCR1); __raw_writel(0xfff7ffff, INT2SMSKCR1);