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drm/i915: Implement 16GB dimm wa for latency level-0 

Memory with 16GB dimms require an increase of 1us in level-0 latency.
This patch implements the same.
Bspec: 4381

changes since V1:
 - s/memdev_info/dram_info
 - make skl_is_16gb_dimm pure function
Changes since V2:
 - make is_16gb_dimm more generic
 - rebase
Changes since V3:
 - Simplify condition (Maarten)

Signed-off-by: Mahesh Kumar <mahesh1.kumar@intel.com>
Reviewed-by: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20180831110942.9234-1-mahesh1.kumar@intel.com
This commit is contained in:
Mahesh Kumar 2018-08-31 16:39:42 +05:30 committed by Rodrigo Vivi
parent 5771caf885
commit 86b592876c
3 changed files with 44 additions and 2 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

33
drivers/gpu/drm/i915/i915_drv.c
View File

@ -1075,6 +1075,21 @@ static enum dram_rank skl_get_dimm_rank(u8 size, u32 rank)
return I915_DRAM_RANK_INVALID;
}
static bool
skl_is_16gb_dimm(enum dram_rank rank, u8 size, u8 width)
{
if (rank == I915_DRAM_RANK_SINGLE && width == 8 && size == 16)
return true;
else if (rank == I915_DRAM_RANK_DUAL && width == 8 && size == 32)
return true;
else if (rank == SKL_DRAM_RANK_SINGLE && width == 16 && size == 8)
return true;
else if (rank == SKL_DRAM_RANK_DUAL && width == 16 && size == 16)
return true;
return false;
}
static int
skl_dram_get_channel_info(struct dram_channel_info *ch, u32 val)
{
@ -1112,6 +1127,11 @@ skl_dram_get_channel_info(struct dram_channel_info *ch, u32 val)
else
ch->rank = I915_DRAM_RANK_SINGLE;
ch->is_16gb_dimm = skl_is_16gb_dimm(ch->l_info.rank, ch->l_info.size,
ch->l_info.width) ||
skl_is_16gb_dimm(ch->s_info.rank, ch->s_info.size,
ch->s_info.width);
DRM_DEBUG_KMS("(size:width:rank) L(%dGB:X%d:%s) S(%dGB:X%d:%s)\n",
ch->l_info.size, ch->l_info.width,
ch->l_info.rank ? "dual" : "single",
@ -1144,6 +1164,8 @@ skl_dram_get_channels_info(struct drm_i915_private *dev_priv)
return -EINVAL;
}
dram_info->valid_dimm = true;
/*
* If any of the channel is single rank channel, worst case output
* will be same as if single rank memory, so consider single rank
@ -1159,6 +1181,10 @@ skl_dram_get_channels_info(struct drm_i915_private *dev_priv)
DRM_INFO("couldn't get memory rank information\n");
return -EINVAL;
}
if (ch0.is_16gb_dimm || ch1.is_16gb_dimm)
dram_info->is_16gb_dimm = true;
return 0;
}
@ -1271,6 +1297,7 @@ bxt_get_dram_info(struct drm_i915_private *dev_priv)
return -EINVAL;
}
dram_info->valid_dimm = true;
dram_info->valid = true;
return 0;
}
@ -1283,6 +1310,8 @@ intel_get_dram_info(struct drm_i915_private *dev_priv)
int ret;
dram_info->valid = false;
dram_info->valid_dimm = false;
dram_info->is_16gb_dimm = false;
dram_info->rank = I915_DRAM_RANK_INVALID;
dram_info->bandwidth_kbps = 0;
dram_info->num_channels = 0;
@ -1306,9 +1335,9 @@ intel_get_dram_info(struct drm_i915_private *dev_priv)
sprintf(bandwidth_str, "unknown");
DRM_DEBUG_KMS("DRAM bandwidth:%s, total-channels: %u\n",
bandwidth_str, dram_info->num_channels);
DRM_DEBUG_KMS("DRAM rank: %s rank\n",
DRM_DEBUG_KMS("DRAM rank: %s rank 16GB-dimm:%s\n",
(dram_info->rank == I915_DRAM_RANK_DUAL) ?
"dual" : "single");
"dual" : "single", yesno(dram_info->is_16gb_dimm));
}
/**

3
drivers/gpu/drm/i915/i915_drv.h
View File

@ -1947,6 +1947,8 @@ struct drm_i915_private {
struct dram_info {
bool valid;
bool valid_dimm;
bool is_16gb_dimm;
u8 num_channels;
enum dram_rank {
I915_DRAM_RANK_INVALID = 0,
@ -2175,6 +2177,7 @@ struct dram_channel_info {
enum dram_rank rank;
} l_info, s_info;
enum dram_rank rank;
bool is_16gb_dimm;
};
static inline struct drm_i915_private *to_i915(const struct drm_device *dev)

10
drivers/gpu/drm/i915/intel_pm.c
View File

@ -2875,6 +2875,16 @@ static void intel_read_wm_latency(struct drm_i915_private *dev_priv,
}
}
/*
* WA Level-0 adjustment for 16GB DIMMs: SKL+
* If we could not get dimm info enable this WA to prevent from
* any underrun. If not able to get Dimm info assume 16GB dimm
* to avoid any underrun.
*/
if (!dev_priv->dram_info.valid_dimm ||
dev_priv->dram_info.is_16gb_dimm)
wm[0] += 1;
} else if (IS_HASWELL(dev_priv) || IS_BROADWELL(dev_priv)) {
uint64_t sskpd = I915_READ64(MCH_SSKPD);