V4L/DVB: staging/lirc: add lirc_ite8709 driver
Signed-off-by: Jarod Wilson <jarod@redhat.com> Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Jarod Wilson
Mauro Carvalho Chehab
parent
4cb613aea4
commit
85cb01afc8
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@ -0,0 +1,542 @@
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/*
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* LIRC driver for ITE8709 CIR port
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*
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* Copyright (C) 2008 Grégory Lardière <spmf2004-lirc@yahoo.fr>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of the
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* License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful, but
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* WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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* General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307
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* USA
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*/
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#include <linux/module.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <linux/delay.h>
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#include <linux/pnp.h>
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#include <linux/io.h>
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#include <media/lirc.h>
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#include <media/lirc_dev.h>
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#define LIRC_DRIVER_NAME "lirc_ite8709"
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#define BUF_CHUNK_SIZE sizeof(int)
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#define BUF_SIZE (128*BUF_CHUNK_SIZE)
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/*
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* The ITE8709 device seems to be the combination of IT8512 superIO chip and
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* a specific firmware running on the IT8512's embedded micro-controller.
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* In addition of the embedded micro-controller, the IT8512 chip contains a
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* CIR module and several other modules. A few modules are directly accessible
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* by the host CPU, but most of them are only accessible by the
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* micro-controller. The CIR module is only accessible by the micro-controller.
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* The battery-backed SRAM module is accessible by the host CPU and the
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* micro-controller. So one of the MC's firmware role is to act as a bridge
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* between the host CPU and the CIR module. The firmware implements a kind of
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* communication protocol using the SRAM module as a shared memory. The IT8512
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* specification is publicly available on ITE's web site, but the communication
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* protocol is not, so it was reverse-engineered.
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*/
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/* ITE8709 Registers addresses and values (reverse-engineered) */
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#define ITE8709_MODE 0x1a
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#define ITE8709_REG_ADR 0x1b
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#define ITE8709_REG_VAL 0x1c
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#define ITE8709_IIR 0x1e /* Interrupt identification register */
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#define ITE8709_RFSR 0x1f /* Receiver FIFO status register */
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#define ITE8709_FIFO_START 0x20
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#define ITE8709_MODE_READY 0X00
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#define ITE8709_MODE_WRITE 0X01
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#define ITE8709_MODE_READ 0X02
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#define ITE8709_IIR_RDAI 0x02 /* Receiver data available interrupt */
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#define ITE8709_IIR_RFOI 0x04 /* Receiver FIFO overrun interrupt */
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#define ITE8709_RFSR_MASK 0x3f /* FIFO byte count mask */
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/*
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* IT8512 CIR-module registers addresses and values
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* (from IT8512 E/F specification v0.4.1)
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*/
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#define IT8512_REG_MSTCR 0x01 /* Master control register */
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#define IT8512_REG_IER 0x02 /* Interrupt enable register */
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#define IT8512_REG_CFR 0x04 /* Carrier frequency register */
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#define IT8512_REG_RCR 0x05 /* Receive control register */
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#define IT8512_REG_BDLR 0x08 /* Baud rate divisor low byte register */
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#define IT8512_REG_BDHR 0x09 /* Baud rate divisor high byte register */
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#define IT8512_MSTCR_RESET 0x01 /* Reset registers to default value */
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#define IT8512_MSTCR_FIFOCLR 0x02 /* Clear FIFO */
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#define IT8512_MSTCR_FIFOTL_7 0x04 /* FIFO threshold level : 7 */
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#define IT8512_MSTCR_FIFOTL_25 0x0c /* FIFO threshold level : 25 */
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#define IT8512_IER_RDAIE 0x02 /* Enable data interrupt request */
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#define IT8512_IER_RFOIE 0x04 /* Enable FIFO overrun interrupt req */
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#define IT8512_IER_IEC 0x80 /* Enable interrupt request */
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#define IT8512_CFR_CF_36KHZ 0x09 /* Carrier freq : low speed, 36kHz */
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#define IT8512_RCR_RXDCR_1 0x01 /* Demodulation carrier range : 1 */
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#define IT8512_RCR_RXACT 0x08 /* Receiver active */
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#define IT8512_RCR_RXEN 0x80 /* Receiver enable */
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#define IT8512_BDR_6 6 /* Baud rate divisor : 6 */
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/* Actual values used by this driver */
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#define CFG_FIFOTL IT8512_MSTCR_FIFOTL_25
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#define CFG_CR_FREQ IT8512_CFR_CF_36KHZ
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#define CFG_DCR IT8512_RCR_RXDCR_1
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#define CFG_BDR IT8512_BDR_6
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#define CFG_TIMEOUT 100000 /* Rearm interrupt when a space is > 100 ms */
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static int debug;
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struct ite8709_device {
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int use_count;
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int io;
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int irq;
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spinlock_t hardware_lock;
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unsigned long long acc_pulse;
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unsigned long long acc_space;
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char lastbit;
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struct timeval last_tv;
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struct lirc_driver driver;
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struct tasklet_struct tasklet;
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char force_rearm;
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char rearmed;
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char device_busy;
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};
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#define dprintk(fmt, args...) \
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do { \
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if (debug) \
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printk(KERN_DEBUG LIRC_DRIVER_NAME ": " \
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fmt, ## args); \
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} while (0)
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static unsigned char ite8709_read(struct ite8709_device *dev,
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unsigned char port)
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{
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outb(port, dev->io);
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return inb(dev->io+1);
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}
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static void ite8709_write(struct ite8709_device *dev, unsigned char port,
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unsigned char data)
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{
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outb(port, dev->io);
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outb(data, dev->io+1);
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}
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static void ite8709_wait_device(struct ite8709_device *dev)
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{
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int i = 0;
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/*
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* loop until device tells it's ready to continue
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* iterations count is usually ~750 but can sometimes achieve 13000
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*/
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for (i = 0; i < 15000; i++) {
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udelay(2);
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if (ite8709_read(dev, ITE8709_MODE) == ITE8709_MODE_READY)
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break;
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}
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}
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static void ite8709_write_register(struct ite8709_device *dev,
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unsigned char reg_adr, unsigned char reg_value)
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{
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ite8709_wait_device(dev);
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ite8709_write(dev, ITE8709_REG_VAL, reg_value);
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ite8709_write(dev, ITE8709_REG_ADR, reg_adr);
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ite8709_write(dev, ITE8709_MODE, ITE8709_MODE_WRITE);
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}
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static void ite8709_init_hardware(struct ite8709_device *dev)
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{
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spin_lock_irq(&dev->hardware_lock);
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dev->device_busy = 1;
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spin_unlock_irq(&dev->hardware_lock);
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ite8709_write_register(dev, IT8512_REG_BDHR, (CFG_BDR >> 8) & 0xff);
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ite8709_write_register(dev, IT8512_REG_BDLR, CFG_BDR & 0xff);
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ite8709_write_register(dev, IT8512_REG_CFR, CFG_CR_FREQ);
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ite8709_write_register(dev, IT8512_REG_IER,
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IT8512_IER_IEC | IT8512_IER_RFOIE | IT8512_IER_RDAIE);
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ite8709_write_register(dev, IT8512_REG_RCR, CFG_DCR);
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ite8709_write_register(dev, IT8512_REG_MSTCR,
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CFG_FIFOTL | IT8512_MSTCR_FIFOCLR);
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ite8709_write_register(dev, IT8512_REG_RCR,
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IT8512_RCR_RXEN | IT8512_RCR_RXACT | CFG_DCR);
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spin_lock_irq(&dev->hardware_lock);
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dev->device_busy = 0;
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spin_unlock_irq(&dev->hardware_lock);
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tasklet_enable(&dev->tasklet);
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}
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static void ite8709_drop_hardware(struct ite8709_device *dev)
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{
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tasklet_disable(&dev->tasklet);
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spin_lock_irq(&dev->hardware_lock);
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dev->device_busy = 1;
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spin_unlock_irq(&dev->hardware_lock);
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ite8709_write_register(dev, IT8512_REG_RCR, 0);
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ite8709_write_register(dev, IT8512_REG_MSTCR,
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IT8512_MSTCR_RESET | IT8512_MSTCR_FIFOCLR);
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spin_lock_irq(&dev->hardware_lock);
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dev->device_busy = 0;
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spin_unlock_irq(&dev->hardware_lock);
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}
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static int ite8709_set_use_inc(void *data)
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{
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struct ite8709_device *dev;
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dev = data;
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if (dev->use_count == 0)
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ite8709_init_hardware(dev);
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dev->use_count++;
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return 0;
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}
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static void ite8709_set_use_dec(void *data)
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{
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struct ite8709_device *dev;
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dev = data;
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dev->use_count--;
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if (dev->use_count == 0)
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ite8709_drop_hardware(dev);
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}
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static void ite8709_add_read_queue(struct ite8709_device *dev, int flag,
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unsigned long long val)
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{
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int value;
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dprintk("add a %llu usec %s\n", val, flag ? "pulse" : "space");
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value = (val > PULSE_MASK) ? PULSE_MASK : val;
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if (flag)
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value |= PULSE_BIT;
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if (!lirc_buffer_full(dev->driver.rbuf)) {
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lirc_buffer_write(dev->driver.rbuf, (void *) &value);
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wake_up(&dev->driver.rbuf->wait_poll);
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}
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}
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static irqreturn_t ite8709_interrupt(int irq, void *dev_id)
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{
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unsigned char data;
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int iir, rfsr, i;
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int fifo = 0;
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char bit;
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struct timeval curr_tv;
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/* Bit duration in microseconds */
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const unsigned long bit_duration = 1000000ul / (115200 / CFG_BDR);
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struct ite8709_device *dev;
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dev = dev_id;
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/*
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* If device is busy, we simply discard data because we are in one of
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* these two cases : shutting down or rearming the device, so this
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* doesn't really matter and this avoids waiting too long in IRQ ctx
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*/
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spin_lock(&dev->hardware_lock);
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if (dev->device_busy) {
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spin_unlock(&dev->hardware_lock);
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return IRQ_RETVAL(IRQ_HANDLED);
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}
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iir = ite8709_read(dev, ITE8709_IIR);
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switch (iir) {
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case ITE8709_IIR_RFOI:
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dprintk("fifo overrun, scheduling forced rearm just in case\n");
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dev->force_rearm = 1;
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tasklet_schedule(&dev->tasklet);
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spin_unlock(&dev->hardware_lock);
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return IRQ_RETVAL(IRQ_HANDLED);
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case ITE8709_IIR_RDAI:
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rfsr = ite8709_read(dev, ITE8709_RFSR);
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fifo = rfsr & ITE8709_RFSR_MASK;
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if (fifo > 32)
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fifo = 32;
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dprintk("iir: 0x%x rfsr: 0x%x fifo: %d\n", iir, rfsr, fifo);
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if (dev->rearmed) {
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do_gettimeofday(&curr_tv);
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dev->acc_space += 1000000ull
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* (curr_tv.tv_sec - dev->last_tv.tv_sec)
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+ (curr_tv.tv_usec - dev->last_tv.tv_usec);
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dev->rearmed = 0;
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}
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for (i = 0; i < fifo; i++) {
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data = ite8709_read(dev, i+ITE8709_FIFO_START);
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data = ~data;
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/* Loop through */
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for (bit = 0; bit < 8; ++bit) {
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if ((data >> bit) & 1) {
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dev->acc_pulse += bit_duration;
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if (dev->lastbit == 0) {
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ite8709_add_read_queue(dev, 0,
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dev->acc_space);
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dev->acc_space = 0;
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}
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} else {
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dev->acc_space += bit_duration;
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if (dev->lastbit == 1) {
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ite8709_add_read_queue(dev, 1,
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dev->acc_pulse);
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dev->acc_pulse = 0;
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}
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}
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dev->lastbit = (data >> bit) & 1;
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}
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}
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ite8709_write(dev, ITE8709_RFSR, 0);
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if (dev->acc_space > CFG_TIMEOUT) {
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dprintk("scheduling rearm IRQ\n");
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do_gettimeofday(&dev->last_tv);
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dev->force_rearm = 0;
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tasklet_schedule(&dev->tasklet);
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}
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spin_unlock(&dev->hardware_lock);
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return IRQ_RETVAL(IRQ_HANDLED);
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default:
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/* not our irq */
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dprintk("unknown IRQ (shouldn't happen) !!\n");
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spin_unlock(&dev->hardware_lock);
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return IRQ_RETVAL(IRQ_NONE);
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}
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}
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static void ite8709_rearm_irq(unsigned long data)
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{
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struct ite8709_device *dev;
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unsigned long flags;
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dev = (struct ite8709_device *) data;
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spin_lock_irqsave(&dev->hardware_lock, flags);
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dev->device_busy = 1;
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spin_unlock_irqrestore(&dev->hardware_lock, flags);
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if (dev->force_rearm || dev->acc_space > CFG_TIMEOUT) {
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dprintk("rearming IRQ\n");
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ite8709_write_register(dev, IT8512_REG_RCR,
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IT8512_RCR_RXACT | CFG_DCR);
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ite8709_write_register(dev, IT8512_REG_MSTCR,
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CFG_FIFOTL | IT8512_MSTCR_FIFOCLR);
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ite8709_write_register(dev, IT8512_REG_RCR,
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IT8512_RCR_RXEN | IT8512_RCR_RXACT | CFG_DCR);
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if (!dev->force_rearm)
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dev->rearmed = 1;
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dev->force_rearm = 0;
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}
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spin_lock_irqsave(&dev->hardware_lock, flags);
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dev->device_busy = 0;
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spin_unlock_irqrestore(&dev->hardware_lock, flags);
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}
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static int ite8709_cleanup(struct ite8709_device *dev, int stage, int errno,
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char *msg)
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{
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if (msg != NULL)
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printk(KERN_ERR LIRC_DRIVER_NAME ": %s\n", msg);
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switch (stage) {
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case 6:
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if (dev->use_count > 0)
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ite8709_drop_hardware(dev);
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case 5:
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free_irq(dev->irq, dev);
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case 4:
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release_region(dev->io, 2);
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case 3:
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lirc_unregister_driver(dev->driver.minor);
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case 2:
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lirc_buffer_free(dev->driver.rbuf);
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kfree(dev->driver.rbuf);
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case 1:
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kfree(dev);
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case 0:
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;
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}
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return errno;
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}
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static int __devinit ite8709_pnp_probe(struct pnp_dev *dev,
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const struct pnp_device_id *dev_id)
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{
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struct lirc_driver *driver;
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struct ite8709_device *ite8709_dev;
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int ret;
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/* Check resources validity */
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if (!pnp_irq_valid(dev, 0))
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return ite8709_cleanup(NULL, 0, -ENODEV, "invalid IRQ");
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if (!pnp_port_valid(dev, 2))
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return ite8709_cleanup(NULL, 0, -ENODEV, "invalid IO port");
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/* Allocate memory for device struct */
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ite8709_dev = kzalloc(sizeof(struct ite8709_device), GFP_KERNEL);
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if (ite8709_dev == NULL)
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return ite8709_cleanup(NULL, 0, -ENOMEM, "kzalloc failed");
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pnp_set_drvdata(dev, ite8709_dev);
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/* Initialize device struct */
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ite8709_dev->use_count = 0;
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ite8709_dev->irq = pnp_irq(dev, 0);
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ite8709_dev->io = pnp_port_start(dev, 2);
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ite8709_dev->hardware_lock =
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__SPIN_LOCK_UNLOCKED(ite8709_dev->hardware_lock);
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ite8709_dev->acc_pulse = 0;
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ite8709_dev->acc_space = 0;
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ite8709_dev->lastbit = 0;
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do_gettimeofday(&ite8709_dev->last_tv);
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tasklet_init(&ite8709_dev->tasklet, ite8709_rearm_irq,
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(long) ite8709_dev);
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ite8709_dev->force_rearm = 0;
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ite8709_dev->rearmed = 0;
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ite8709_dev->device_busy = 0;
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/* Initialize driver struct */
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driver = &ite8709_dev->driver;
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strcpy(driver->name, LIRC_DRIVER_NAME);
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driver->minor = -1;
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driver->code_length = sizeof(int) * 8;
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driver->sample_rate = 0;
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driver->features = LIRC_CAN_REC_MODE2;
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driver->data = ite8709_dev;
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driver->add_to_buf = NULL;
|
||||
driver->set_use_inc = ite8709_set_use_inc;
|
||||
driver->set_use_dec = ite8709_set_use_dec;
|
||||
driver->dev = &dev->dev;
|
||||
driver->owner = THIS_MODULE;
|
||||
|
||||
/* Initialize LIRC buffer */
|
||||
driver->rbuf = kmalloc(sizeof(struct lirc_buffer), GFP_KERNEL);
|
||||
if (!driver->rbuf)
|
||||
return ite8709_cleanup(ite8709_dev, 1, -ENOMEM,
|
||||
"can't allocate lirc_buffer");
|
||||
if (lirc_buffer_init(driver->rbuf, BUF_CHUNK_SIZE, BUF_SIZE))
|
||||
return ite8709_cleanup(ite8709_dev, 1, -ENOMEM,
|
||||
"lirc_buffer_init() failed");
|
||||
|
||||
/* Register LIRC driver */
|
||||
ret = lirc_register_driver(driver);
|
||||
if (ret < 0)
|
||||
return ite8709_cleanup(ite8709_dev, 2, ret,
|
||||
"lirc_register_driver() failed");
|
||||
|
||||
/* Reserve I/O port access */
|
||||
if (!request_region(ite8709_dev->io, 2, LIRC_DRIVER_NAME))
|
||||
return ite8709_cleanup(ite8709_dev, 3, -EBUSY,
|
||||
"i/o port already in use");
|
||||
|
||||
/* Reserve IRQ line */
|
||||
ret = request_irq(ite8709_dev->irq, ite8709_interrupt, 0,
|
||||
LIRC_DRIVER_NAME, ite8709_dev);
|
||||
if (ret < 0)
|
||||
return ite8709_cleanup(ite8709_dev, 4, ret,
|
||||
"IRQ already in use");
|
||||
|
||||
/* Initialize hardware */
|
||||
ite8709_drop_hardware(ite8709_dev); /* Shutdown hw until first use */
|
||||
|
||||
printk(KERN_INFO LIRC_DRIVER_NAME ": device found : irq=%d io=0x%x\n",
|
||||
ite8709_dev->irq, ite8709_dev->io);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __devexit ite8709_pnp_remove(struct pnp_dev *dev)
|
||||
{
|
||||
struct ite8709_device *ite8709_dev;
|
||||
ite8709_dev = pnp_get_drvdata(dev);
|
||||
|
||||
ite8709_cleanup(ite8709_dev, 6, 0, NULL);
|
||||
|
||||
printk(KERN_INFO LIRC_DRIVER_NAME ": device removed\n");
|
||||
}
|
||||
|
||||
#ifdef CONFIG_PM
|
||||
static int ite8709_pnp_suspend(struct pnp_dev *dev, pm_message_t state)
|
||||
{
|
||||
struct ite8709_device *ite8709_dev;
|
||||
ite8709_dev = pnp_get_drvdata(dev);
|
||||
|
||||
if (ite8709_dev->use_count > 0)
|
||||
ite8709_drop_hardware(ite8709_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int ite8709_pnp_resume(struct pnp_dev *dev)
|
||||
{
|
||||
struct ite8709_device *ite8709_dev;
|
||||
ite8709_dev = pnp_get_drvdata(dev);
|
||||
|
||||
if (ite8709_dev->use_count > 0)
|
||||
ite8709_init_hardware(ite8709_dev);
|
||||
|
||||
return 0;
|
||||
}
|
||||
#else
|
||||
#define ite8709_pnp_suspend NULL
|
||||
#define ite8709_pnp_resume NULL
|
||||
#endif
|
||||
|
||||
static const struct pnp_device_id pnp_dev_table[] = {
|
||||
{"ITE8709", 0},
|
||||
{}
|
||||
};
|
||||
|
||||
MODULE_DEVICE_TABLE(pnp, pnp_dev_table);
|
||||
|
||||
static struct pnp_driver ite8709_pnp_driver = {
|
||||
.name = LIRC_DRIVER_NAME,
|
||||
.probe = ite8709_pnp_probe,
|
||||
.remove = __devexit_p(ite8709_pnp_remove),
|
||||
.suspend = ite8709_pnp_suspend,
|
||||
.resume = ite8709_pnp_resume,
|
||||
.id_table = pnp_dev_table,
|
||||
};
|
||||
|
||||
static int __init ite8709_init_module(void)
|
||||
{
|
||||
return pnp_register_driver(&ite8709_pnp_driver);
|
||||
}
|
||||
module_init(ite8709_init_module);
|
||||
|
||||
static void __exit ite8709_cleanup_module(void)
|
||||
{
|
||||
pnp_unregister_driver(&ite8709_pnp_driver);
|
||||
}
|
||||
module_exit(ite8709_cleanup_module);
|
||||
|
||||
MODULE_DESCRIPTION("LIRC driver for ITE8709 CIR port");
|
||||
MODULE_AUTHOR("Grégory Lardière");
|
||||
MODULE_LICENSE("GPL");
|
||||
|
||||
module_param(debug, bool, S_IRUGO | S_IWUSR);
|
||||
MODULE_PARM_DESC(debug, "Enable debugging messages");
|
||||
Loading…
Reference in New Issue