Keystone DTS updates for 3.14
- ddr3 pll clock node typo fixup. - EVM specific clock setting with board k2hk-evm.dts. - GIC node updates for missing virtualisation info. - Adding USB dwc3 and phy nodes. -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.11 (GNU/Linux) iQIcBAABAgAGBQJSr2ydAAoJEHJsHOdBp5c/2NcQAIlwONuPEA/TuBPZeKR98HT0 RECH9OdorSSUOsx6trYN+UA5hMB/gMZfioO018rZxluQynoV5q6tdFZk/LtwjvkV 0kwX7VakAZNXEphS9382SzPMoYXOuSEejC1zeNuJmHSMGwGOtPKNcBs2rAsC/xwo 9ZeJ0hzwHCWnTBPCZmjg1R2zU796CIiPMVAhVu4KidWsfceob+dg38dMSA/BBshP cSusOeHcVcBMycgFgtqCOlNbVtBS51H39d2VLGJ9rHxOuqiNBCfUzUFCXGXrzIWd US9Nsce7VmMjkj9Tvm0bpR28BmU+xNrUM+IyfzncBRtQEJarhmnQo91eU63+P5I5 F2P2JAWI77ikif98uOmswFBFNqJoxd4IYEzenbq4HUzGe3lzYzEtiFttq0XegRIt FKbgkYQSsXFgRDDqNc7gDRGx6xZboSYjZlXnWUhxTEp/+1UnLty99Vk6reRj6lpN eQ2tQWnuGj9ymL+ekNfxa7qCR4lDMLhytK51tsRN8AZgRoohwB/4rnTP9yJPfuIo ktrIMsBzjkqljl2lYy2wCvmADzjv7FS16H9O2PG7MBtTiTUwOfgjy1d7sPvJxbLX 3xpbsEpZYnOebjj9Z51VeG+RDCY4YcAQf7Y1OFpJ/j79h8Jq4VuIHMXHw1TffJee CAycXZLPd6R/aN78IKAV =vJvA -----END PGP SIGNATURE----- Merge tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt Keystone DTS updates for 3.14 - ddr3 pll clock node typo fixup. - EVM specific clock setting with board k2hk-evm.dts. - GIC node updates for missing virtualisation info. - Adding USB dwc3 and phy nodes. * tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone: ARM: dts: keystone: Add usb devicetree bindings ARM: dts: keystone: Add usb phy devicetree bindings ARM: dts: keystone: Add guestos maintenance interrupt ARM: dts: keystone: Add the GICV and GICH address space ARM: keystone: dts: add paclk divider clock node ARM: keystone: dts: fix typo in the ddr3 pllclk node name ARM: keystone: dts: add a k2hk-evm specific dts file Signed-off-by: Kevin Hilman <khilman@linaro.org>
This commit is contained in:
commit
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TI Keystone USB PHY
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Required properties:
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- compatible: should be "ti,keystone-usbphy".
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- #address-cells, #size-cells : should be '1' if the device has sub-nodes
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with 'reg' property.
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- reg : Address and length of the usb phy control register set.
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The main purpose of this PHY driver is to enable the USB PHY reference clock
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gate on the Keystone SOC for both the USB2 and USB3 PHY. Otherwise it is just
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an NOP PHY driver. Hence this node is referenced as both the usb2 and usb3
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phy node in the USB Glue layer driver node.
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usb_phy: usb_phy@2620738 {
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compatible = "ti,keystone-usbphy";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2620738 32>;
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status = "disabled";
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};
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TI Keystone Soc USB Controller
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DWC3 GLUE
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Required properties:
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- compatible: should be "ti,keystone-dwc3".
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- #address-cells, #size-cells : should be '1' if the device has sub-nodes
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with 'reg' property.
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- reg : Address and length of the register set for the USB subsystem on
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the SOC.
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- interrupts : The irq number of this device that is used to interrupt the
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MPU.
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- ranges: allows valid 1:1 translation between child's address space and
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parent's address space.
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- clocks: Clock IDs array as required by the controller.
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- clock-names: names of clocks correseponding to IDs in the clock property.
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Sub-nodes:
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The dwc3 core should be added as subnode to Keystone DWC3 glue.
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- dwc3 :
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The binding details of dwc3 can be found in:
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Documentation/devicetree/bindings/usb/dwc3.txt
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Example:
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usb: usb@2680000 {
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compatible = "ti,keystone-dwc3";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2680000 0x10000>;
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clocks = <&clkusb>;
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clock-names = "usb";
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interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
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ranges;
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status = "disabled";
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dwc3@2690000 {
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compatible = "synopsys,dwc3";
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reg = <0x2690000 0x70000>;
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interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
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usb-phy = <&usb_phy>, <&usb_phy>;
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};
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};
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@ -0,0 +1,63 @@
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/*
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* Copyright 2013 Texas Instruments, Inc.
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*
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* Keystone 2 Kepler/Hawking EVM device tree
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include "keystone.dtsi"
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/ {
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compatible = "ti,keystone-evm";
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soc {
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clock {
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refclksys: refclksys {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <122880000>;
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clock-output-names = "refclk-sys";
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};
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refclkpass: refclkpass {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <122880000>;
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clock-output-names = "refclk-pass";
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};
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refclkarm: refclkarm {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <125000000>;
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clock-output-names = "refclk-arm";
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};
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refclkddr3a: refclkddr3a {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "refclk-ddr3a";
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};
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refclkddr3b: refclkddr3b {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <100000000>;
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clock-output-names = "refclk-ddr3b";
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};
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};
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};
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};
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&usb_phy {
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status = "okay";
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};
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&usb {
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status = "okay";
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};
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@ -13,17 +13,10 @@ clocks {
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#size-cells = <1>;
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ranges;
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refclkmain: refclkmain {
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#clock-cells = <0>;
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compatible = "fixed-clock";
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clock-frequency = <122880000>;
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clock-output-names = "refclk-main";
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};
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mainpllclk: mainpllclk@2310110 {
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#clock-cells = <0>;
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compatible = "ti,keystone,main-pll-clock";
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clocks = <&refclkmain>;
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clocks = <&refclksys>;
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reg = <0x02620350 4>, <0x02310110 4>;
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reg-names = "control", "multiplier";
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fixed-postdiv = <2>;
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papllclk: papllclk@2620358 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkmain>;
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clocks = <&refclkpass>;
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clock-output-names = "pa-pll-clk";
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reg = <0x02620358 4>;
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reg-names = "control";
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fixed-postdiv = <6>;
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};
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ddr3allclk: ddr3apllclk@2620360 {
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ddr3apllclk: ddr3apllclk@2620360 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkmain>;
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clocks = <&refclkddr3a>;
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clock-output-names = "ddr-3a-pll-clk";
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reg = <0x02620360 4>;
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reg-names = "control";
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fixed-postdiv = <6>;
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};
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ddr3bllclk: ddr3bpllclk@2620368 {
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ddr3bpllclk: ddr3bpllclk@2620368 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkmain>;
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clocks = <&refclkddr3b>;
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clock-output-names = "ddr-3b-pll-clk";
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reg = <0x02620368 4>;
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reg-names = "control";
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fixed-postdiv = <6>;
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};
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armpllclk: armpllclk@2620370 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-clock";
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clocks = <&refclkmain>;
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clocks = <&refclkarm>;
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clock-output-names = "arm-pll-clk";
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reg = <0x02620370 4>;
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reg-names = "control";
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fixed-postdiv = <6>;
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};
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mainmuxclk: mainmuxclk@2310108 {
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#clock-cells = <0>;
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compatible = "ti,keystone,pll-mux-clock";
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clocks = <&mainpllclk>, <&refclkmain>;
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clocks = <&mainpllclk>, <&refclksys>;
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reg = <0x02310108 4>;
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bit-shift = <23>;
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bit-mask = <1>;
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clock-output-names = "chipclk13";
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};
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paclk13: paclk13 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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clocks = <&papllclk>;
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clock-div = <3>;
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clock-mult = <1>;
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clock-output-names = "paclk13";
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};
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chipclk14: chipclk14 {
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#clock-cells = <0>;
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compatible = "fixed-factor-clock";
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@ -6,14 +6,12 @@
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* published by the Free Software Foundation.
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*/
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/dts-v1/;
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#include <dt-bindings/interrupt-controller/arm-gic.h>
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#include "skeleton.dtsi"
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/ {
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model = "Texas Instruments Keystone 2 SoC";
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compatible = "ti,keystone-evm";
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#address-cells = <2>;
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#size-cells = <2>;
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interrupt-parent = <&gic>;
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#address-cells = <1>;
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interrupt-controller;
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reg = <0x0 0x02561000 0x0 0x1000>,
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<0x0 0x02562000 0x0 0x2000>;
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<0x0 0x02562000 0x0 0x2000>,
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<0x0 0x02564000 0x0 0x1000>,
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<0x0 0x02566000 0x0 0x2000>;
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interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
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IRQ_TYPE_LEVEL_HIGH)>;
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};
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timer {
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interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
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clocks = <&clkspi>;
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};
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usb_phy: usb_phy@2620738 {
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compatible = "ti,keystone-usbphy";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2620738 32>;
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status = "disabled";
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};
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usb: usb@2680000 {
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compatible = "ti,keystone-dwc3";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x2680000 0x10000>;
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clocks = <&clkusb>;
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clock-names = "usb";
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interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
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ranges;
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status = "disabled";
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dwc3@2690000 {
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compatible = "synopsys,dwc3";
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reg = <0x2690000 0x70000>;
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interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
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usb-phy = <&usb_phy>, <&usb_phy>;
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};
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};
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};
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};
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