Keystone DTS updates for 3.14

- ddr3 pll clock node typo fixup.
 - EVM specific clock setting with board k2hk-evm.dts.
 - GIC node updates for missing virtualisation info.
 - Adding USB dwc3 and phy nodes.
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Merge tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone into next/dt

Keystone DTS updates for 3.14

- ddr3 pll clock node typo fixup.
- EVM specific clock setting with board k2hk-evm.dts.
- GIC node updates for missing virtualisation info.
- Adding USB dwc3 and phy nodes.

* tag 'keystone-dts' of git://git.kernel.org/pub/scm/linux/kernel/git/ssantosh/linux-keystone:
  ARM: dts: keystone: Add usb devicetree bindings
  ARM: dts: keystone: Add usb phy devicetree bindings
  ARM: dts: keystone: Add guestos maintenance interrupt
  ARM: dts: keystone: Add the GICV and GICH address space
  ARM: keystone: dts: add paclk divider clock node
  ARM: keystone: dts: fix typo in the ddr3 pllclk node name
  ARM: keystone: dts: add a k2hk-evm specific dts file

Signed-off-by: Kevin Hilman <khilman@linaro.org>
This commit is contained in:
Kevin Hilman 2013-12-20 07:25:39 -08:00
commit 84dac16a3b
5 changed files with 174 additions and 22 deletions

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@ -0,0 +1,20 @@
TI Keystone USB PHY
Required properties:
- compatible: should be "ti,keystone-usbphy".
- #address-cells, #size-cells : should be '1' if the device has sub-nodes
with 'reg' property.
- reg : Address and length of the usb phy control register set.
The main purpose of this PHY driver is to enable the USB PHY reference clock
gate on the Keystone SOC for both the USB2 and USB3 PHY. Otherwise it is just
an NOP PHY driver. Hence this node is referenced as both the usb2 and usb3
phy node in the USB Glue layer driver node.
usb_phy: usb_phy@2620738 {
compatible = "ti,keystone-usbphy";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2620738 32>;
status = "disabled";
};

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@ -0,0 +1,42 @@
TI Keystone Soc USB Controller
DWC3 GLUE
Required properties:
- compatible: should be "ti,keystone-dwc3".
- #address-cells, #size-cells : should be '1' if the device has sub-nodes
with 'reg' property.
- reg : Address and length of the register set for the USB subsystem on
the SOC.
- interrupts : The irq number of this device that is used to interrupt the
MPU.
- ranges: allows valid 1:1 translation between child's address space and
parent's address space.
- clocks: Clock IDs array as required by the controller.
- clock-names: names of clocks correseponding to IDs in the clock property.
Sub-nodes:
The dwc3 core should be added as subnode to Keystone DWC3 glue.
- dwc3 :
The binding details of dwc3 can be found in:
Documentation/devicetree/bindings/usb/dwc3.txt
Example:
usb: usb@2680000 {
compatible = "ti,keystone-dwc3";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2680000 0x10000>;
clocks = <&clkusb>;
clock-names = "usb";
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
ranges;
status = "disabled";
dwc3@2690000 {
compatible = "synopsys,dwc3";
reg = <0x2690000 0x70000>;
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
usb-phy = <&usb_phy>, <&usb_phy>;
};
};

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@ -0,0 +1,63 @@
/*
* Copyright 2013 Texas Instruments, Inc.
*
* Keystone 2 Kepler/Hawking EVM device tree
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
/dts-v1/;
#include "keystone.dtsi"
/ {
compatible = "ti,keystone-evm";
soc {
clock {
refclksys: refclksys {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <122880000>;
clock-output-names = "refclk-sys";
};
refclkpass: refclkpass {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <122880000>;
clock-output-names = "refclk-pass";
};
refclkarm: refclkarm {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <125000000>;
clock-output-names = "refclk-arm";
};
refclkddr3a: refclkddr3a {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
clock-output-names = "refclk-ddr3a";
};
refclkddr3b: refclkddr3b {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <100000000>;
clock-output-names = "refclk-ddr3b";
};
};
};
};
&usb_phy {
status = "okay";
};
&usb {
status = "okay";
};

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@ -13,17 +13,10 @@ clocks {
#size-cells = <1>;
ranges;
refclkmain: refclkmain {
#clock-cells = <0>;
compatible = "fixed-clock";
clock-frequency = <122880000>;
clock-output-names = "refclk-main";
};
mainpllclk: mainpllclk@2310110 {
#clock-cells = <0>;
compatible = "ti,keystone,main-pll-clock";
clocks = <&refclkmain>;
clocks = <&refclksys>;
reg = <0x02620350 4>, <0x02310110 4>;
reg-names = "control", "multiplier";
fixed-postdiv = <2>;
@ -32,47 +25,43 @@ clocks {
papllclk: papllclk@2620358 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkmain>;
clocks = <&refclkpass>;
clock-output-names = "pa-pll-clk";
reg = <0x02620358 4>;
reg-names = "control";
fixed-postdiv = <6>;
};
ddr3allclk: ddr3apllclk@2620360 {
ddr3apllclk: ddr3apllclk@2620360 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkmain>;
clocks = <&refclkddr3a>;
clock-output-names = "ddr-3a-pll-clk";
reg = <0x02620360 4>;
reg-names = "control";
fixed-postdiv = <6>;
};
ddr3bllclk: ddr3bpllclk@2620368 {
ddr3bpllclk: ddr3bpllclk@2620368 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkmain>;
clocks = <&refclkddr3b>;
clock-output-names = "ddr-3b-pll-clk";
reg = <0x02620368 4>;
reg-names = "control";
fixed-postdiv = <6>;
};
armpllclk: armpllclk@2620370 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-clock";
clocks = <&refclkmain>;
clocks = <&refclkarm>;
clock-output-names = "arm-pll-clk";
reg = <0x02620370 4>;
reg-names = "control";
fixed-postdiv = <6>;
};
mainmuxclk: mainmuxclk@2310108 {
#clock-cells = <0>;
compatible = "ti,keystone,pll-mux-clock";
clocks = <&mainpllclk>, <&refclkmain>;
clocks = <&mainpllclk>, <&refclksys>;
reg = <0x02310108 4>;
bit-shift = <23>;
bit-mask = <1>;
@ -135,6 +124,15 @@ clocks {
clock-output-names = "chipclk13";
};
paclk13: paclk13 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";
clocks = <&papllclk>;
clock-div = <3>;
clock-mult = <1>;
clock-output-names = "paclk13";
};
chipclk14: chipclk14 {
#clock-cells = <0>;
compatible = "fixed-factor-clock";

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@ -6,14 +6,12 @@
* published by the Free Software Foundation.
*/
/dts-v1/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include "skeleton.dtsi"
/ {
model = "Texas Instruments Keystone 2 SoC";
compatible = "ti,keystone-evm";
#address-cells = <2>;
#size-cells = <2>;
interrupt-parent = <&gic>;
@ -64,7 +62,11 @@
#address-cells = <1>;
interrupt-controller;
reg = <0x0 0x02561000 0x0 0x1000>,
<0x0 0x02562000 0x0 0x2000>;
<0x0 0x02562000 0x0 0x2000>,
<0x0 0x02564000 0x0 0x1000>,
<0x0 0x02566000 0x0 0x2000>;
interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
IRQ_TYPE_LEVEL_HIGH)>;
};
timer {
@ -179,5 +181,32 @@
interrupts = <GIC_SPI 300 IRQ_TYPE_EDGE_RISING>;
clocks = <&clkspi>;
};
usb_phy: usb_phy@2620738 {
compatible = "ti,keystone-usbphy";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2620738 32>;
status = "disabled";
};
usb: usb@2680000 {
compatible = "ti,keystone-dwc3";
#address-cells = <1>;
#size-cells = <1>;
reg = <0x2680000 0x10000>;
clocks = <&clkusb>;
clock-names = "usb";
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
ranges;
status = "disabled";
dwc3@2690000 {
compatible = "synopsys,dwc3";
reg = <0x2690000 0x70000>;
interrupts = <GIC_SPI 393 IRQ_TYPE_EDGE_RISING>;
usb-phy = <&usb_phy>, <&usb_phy>;
};
};
};
};