clk: rockchip: Add more PLL rates for rk3568
This adds a few more PLL settings needed for some standard resolutions: 297MHz 3840x2160-30.00 241.5MHz 2560x1440-59.95 135MHz 1280x1024-75.02 119MHz 1680x1050-59.88 108MHz 1280x1024-60.02 78.75MHz 1024x768-75.03 Changes since v3: - new patch Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de> Link: https://lore.kernel.org/r/20220126145549.617165-12-s.hauer@pengutronix.de Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -71,11 +71,17 @@ static struct rockchip_pll_rate_table rk3568_pll_rates[] = {
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RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
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RK3036_PLL_RATE(500000000, 1, 125, 6, 1, 1, 0),
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RK3036_PLL_RATE(408000000, 1, 68, 2, 2, 1, 0),
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RK3036_PLL_RATE(408000000, 1, 68, 2, 2, 1, 0),
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RK3036_PLL_RATE(312000000, 1, 78, 6, 1, 1, 0),
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RK3036_PLL_RATE(312000000, 1, 78, 6, 1, 1, 0),
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RK3036_PLL_RATE(297000000, 2, 99, 4, 1, 1, 0),
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RK3036_PLL_RATE(241500000, 2, 161, 4, 2, 1, 0),
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RK3036_PLL_RATE(216000000, 1, 72, 4, 2, 1, 0),
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RK3036_PLL_RATE(216000000, 1, 72, 4, 2, 1, 0),
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RK3036_PLL_RATE(200000000, 1, 100, 3, 4, 1, 0),
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RK3036_PLL_RATE(200000000, 1, 100, 3, 4, 1, 0),
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RK3036_PLL_RATE(148500000, 1, 99, 4, 4, 1, 0),
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RK3036_PLL_RATE(148500000, 1, 99, 4, 4, 1, 0),
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RK3036_PLL_RATE(135000000, 2, 45, 4, 1, 1, 0),
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RK3036_PLL_RATE(119000000, 3, 119, 4, 2, 1, 0),
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RK3036_PLL_RATE(108000000, 2, 45, 5, 1, 1, 0),
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RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
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RK3036_PLL_RATE(100000000, 1, 150, 6, 6, 1, 0),
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RK3036_PLL_RATE(96000000, 1, 96, 6, 4, 1, 0),
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RK3036_PLL_RATE(96000000, 1, 96, 6, 4, 1, 0),
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RK3036_PLL_RATE(78750000, 1, 96, 6, 4, 1, 0),
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RK3036_PLL_RATE(74250000, 2, 99, 4, 4, 1, 0),
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RK3036_PLL_RATE(74250000, 2, 99, 4, 4, 1, 0),
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{ /* sentinel */ },
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{ /* sentinel */ },
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};
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};
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