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This augments the RealView and Versatile device trees to properly 

define the VGA and panel connectors in preparation for DRM.
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Merge tag 'armsoc-versatile-drm-dts' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator into next/dt

Pull "DTS changes for RealView+Versatile" from Linus Walleij:

This augments the RealView and Versatile device trees to properly
define the VGA and panel connectors in preparation for DRM.

* tag 'armsoc-versatile-drm-dts' of ssh://gitolite.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator:
  ARM: dts: Augment panel setting for Versatile
  ARM: dts: Add Versatile IB2 device tree
  ARM: dts: Augment VGA connector bridge on Realview PBX
  ARM: dts: Augment VGA connector bridge on Realview EB
  ARM: dts: Augment VGA connector bridge on PB1176
  ARM: dts: Augment VGA connector bridge on PB11MPcore
This commit is contained in:
Arnd Bergmann 2018-03-27 14:24:01 +02:00
parent c073f31a96 e65857a64f
commit 8408e650bb
7 changed files with 296 additions and 104 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

1
arch/arm/boot/dts/Makefile
View File

@ -1064,6 +1064,7 @@ dtb-$(CONFIG_ARCH_UNIPHIER) += \
uniphier-sld8-ref.dtb
dtb-$(CONFIG_ARCH_VERSATILE) += \
versatile-ab.dtb \
versatile-ab-ib2.dtb \
versatile-pb.dtb
dtb-$(CONFIG_ARCH_VEXPRESS) += \
vexpress-v2p-ca5s.dtb \

64
arch/arm/boot/dts/arm-realview-eb.dtsi
View File

@ -143,6 +143,43 @@
port1-otg;
};
bridge {
compatible = "ti,ths8134a", "ti,ths8134";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
vga {
compatible = "vga-connector";
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_bridge_out>;
};
};
};
/* These peripherals are inside the FPGA */
fpga {
#address-cells = <1>;
@ -409,36 +446,15 @@
interrupt-names = "combined";
clocks = <&oscclk0>, <&pclk>;
clock-names = "clcdclk", "apb_pclk";
/* 1024x768 16bpp @65MHz works fine */
max-memory-bandwidth = <95000000>;
port {
clcd_pads: endpoint {
remote-endpoint = <&clcd_panel>;
remote-endpoint = <&vga_bridge_in>;
arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
};
};
panel {
compatible = "panel-dpi";
port {
clcd_panel: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
/* Standard 640x480 VGA timings */
panel-timing {
clock-frequency = <25175000>;
hactive = <640>;
hback-porch = <48>;
hfront-porch = <16>;
hsync-len = <96>;
vactive = <480>;
vback-porch = <33>;
vfront-porch = <10>;
vsync-len = <2>;
};
};
};
};
};

66
arch/arm/boot/dts/arm-realview-pb1176.dts
View File

@ -161,6 +161,43 @@
port1-otg;
};
bridge {
compatible = "ti,ths8134a", "ti,ths8134";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
vga {
compatible = "vga-connector";
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_bridge_out>;
};
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
@ -403,36 +440,15 @@
interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&oscclk0>, <&pclk>;
clock-names = "clcdclk", "apb_pclk";
/* 1024x768 16bpp @65MHz works fine */
max-memory-bandwidth = <95000000>;
port {
clcd_pads: endpoint {
remote-endpoint = <&clcd_panel>;
remote-endpoint = <&vga_bridge_in>;
arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
};
};
panel {
compatible = "panel-dpi";
port {
clcd_panel: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
/* Standard 640x480 VGA timings */
panel-timing {
clock-frequency = <25175000>;
hactive = <640>;
hback-porch = <48>;
hfront-porch = <16>;
hsync-len = <96>;
vactive = <480>;
vback-porch = <33>;
vfront-porch = <10>;
vsync-len = <2>;
};
};
};
};
@ -564,7 +580,5 @@
clocks = <&pclk>;
clock-names = "apb_pclk";
};
};
};

78
arch/arm/boot/dts/arm-realview-pb11mp.dts
View File

@ -242,6 +242,49 @@
bank-width = <4>;
};
bridge {
compatible = "ti,ths8134a", "ti,ths8134";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
vga {
/*
* This DDC I2C is connected directly to the DVI portions
* of the connector, so it's not really working when the
* monitor is connected to the VGA connector.
*/
compatible = "vga-connector";
ddc-i2c-bus = <&i2c1>;
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_bridge_out>;
};
};
};
soc {
#address-cells = <1>;
#size-cells = <1>;
@ -575,6 +618,13 @@
clock-names = "apb_pclk";
};
i2c1: i2c@10016000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "arm,versatile-i2c";
reg = <0x10016000 0x1000>;
};
rtc: rtc@10017000 {
compatible = "arm,pl031", "arm,primecell";
reg = <0x10017000 0x1000>;
@ -609,37 +659,15 @@
interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&oscclk4>, <&pclk>;
clock-names = "clcdclk", "apb_pclk";
max-memory-bandwidth = <130000000>; /* 16bpp @ 63.5MHz */
/* 1024x768 16bpp @65MHz works fine */
max-memory-bandwidth = <95000000>;
port {
clcd_pads: endpoint {
remote-endpoint = <&clcd_panel>;
remote-endpoint = <&vga_bridge_in>;
arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
};
};
panel {
compatible = "panel-dpi";
port {
clcd_panel: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
/* Standard 640x480 VGA timings */
panel-timing {
clock-frequency = <25175000>;
hactive = <640>;
hback-porch = <48>;
hfront-porch = <16>;
hsync-len = <96>;
vactive = <480>;
vback-porch = <33>;
vfront-porch = <10>;
vsync-len = <2>;
};
};
};
/*

82
arch/arm/boot/dts/arm-realview-pbx.dtsi
View File

@ -34,7 +34,8 @@
serial1 = &serial1;
serial2 = &serial2;
serial3 = &serial3;
i2c0 = &i2c;
i2c0 = &i2c0;
i2c1 = &i2c1;
};
memory {
@ -158,6 +159,49 @@
port1-otg;
};
bridge {
compatible = "ti,ths8134a", "ti,ths8134";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
vga {
/*
* This DDC I2C is connected directly to the DVI portions
* of the connector, so it's not really working when the
* monitor is connected to the VGA connector.
*/
compatible = "vga-connector";
ddc-i2c-bus = <&i2c1>;
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_bridge_out>;
};
};
};
soc: soc@0 {
compatible = "arm,realview-pbx-soc", "simple-bus";
#address-cells = <1>;
@ -285,7 +329,7 @@
<&timclk>;
};
i2c: i2c@10002000 {
i2c0: i2c@10002000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "arm,versatile-i2c";
@ -396,7 +440,12 @@
clock-names = "apb_pclk";
};
/* DVI serial bus control is at 10016000 */
i2c1: i2c@10016000 {
#address-cells = <1>;
#size-cells = <0>;
compatible = "arm,versatile-i2c";
reg = <0x10016000 0x1000>;
};
rtc: rtc@10017000 {
compatible = "arm,pl031", "arm,primecell";
@ -506,36 +555,15 @@
interrupt-names = "combined";
clocks = <&oscclk4>, <&pclk>;
clock-names = "clcdclk", "apb_pclk";
/* 1024x768 16bpp @65MHz works fine */
max-memory-bandwidth = <95000000>;
port {
clcd_pads: endpoint {
remote-endpoint = <&clcd_panel>;
remote-endpoint = <&vga_bridge_in>;
arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
};
};
panel {
compatible = "panel-dpi";
port {
clcd_panel: endpoint {
remote-endpoint = <&clcd_pads>;
};
};
/* Standard 640x480 VGA timings */
panel-timing {
clock-frequency = <25175000>;
hactive = <640>;
hback-porch = <48>;
hfront-porch = <16>;
hsync-len = <96>;
vactive = <480>;
vback-porch = <33>;
vfront-porch = <10>;
vsync-len = <2>;
};
};
};
};
};

26
arch/arm/boot/dts/versatile-ab-ib2.dts Normal file
View File

@ -0,0 +1,26 @@
// SPDX-License-Identifier: GPL-2.0
/*
* The Versatile AB with the IB2 expansion board mounted.
* This works as a superset of the Versatile AB.
*/
#include "versatile-ab.dts"
/ {
model = "ARM Versatile AB + IB2 board";
/* Special IB2 control register */
ib2_syscon@27000000 {
compatible = "arm,versatile-ib2-syscon", "syscon", "simple-mfd";
reg = <0x27000000 0x4>;
led@00.4 {
compatible = "register-bit-led";
offset = <0x00>;
mask = <0x10>;
label = "versatile-ib2:0";
linux,default-trigger = "heartbeat";
default-state = "on";
};
};
};

83
arch/arm/boot/dts/versatile-ab.dts
View File

@ -30,6 +30,43 @@
clock-frequency = <24000000>;
};
bridge {
compatible = "ti,ths8134b", "ti,ths8134";
#address-cells = <1>;
#size-cells = <0>;
ports {
#address-cells = <1>;
#size-cells = <0>;
port@0 {
reg = <0>;
vga_bridge_in: endpoint {
remote-endpoint = <&clcd_pads_vga_dac>;
};
};
port@1 {
reg = <1>;
vga_bridge_out: endpoint {
remote-endpoint = <&vga_con_in>;
};
};
};
};
vga {
compatible = "vga-connector";
port {
vga_con_in: endpoint {
remote-endpoint = <&vga_bridge_out>;
};
};
};
core-module@10000000 {
compatible = "arm,core-module-versatile", "syscon", "simple-mfd";
reg = <0x10000000 0x200>;
@ -230,7 +267,39 @@
reg = <0x10120000 0x1000>;
interrupts = <16>;
clocks = <&osc1>, <&pclk>;
clock-names = "clcd", "apb_pclk";
clock-names = "clcdclk", "apb_pclk";
/* 800x600 16bpp @ 36MHz works fine */
max-memory-bandwidth = <54000000>;
/*
* This port is routed through a PLD (Programmable
* Logic Device) that routes the output from the CLCD
* (after transformations) to the VGA DAC and also an
* external panel connector. The PLD is essential for
* supporting RGB565/BGR565.
*
* The signals from the port thus reaches two endpoints.
* The PLD is managed through a few special bits in the
* FPGA "sysreg".
*
* This arrangement can be clearly seen in
* ARM DUI 0225D, page 3-41, figure 3-19.
*/
port@0 {
#address-cells = <1>;
#size-cells = <0>;
clcd_pads_panel: endpoint@0 {
reg = <0>;
remote-endpoint = <&panel_in>;
arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
};
clcd_pads_vga_dac: endpoint@1 {
reg = <1>;
remote-endpoint = <&vga_bridge_in>;
arm,pl11x,tft-r0g0b0-pads = <0 8 16>;
};
};
};
sctl@101e0000 {
@ -319,8 +388,18 @@
ranges = <0 0x10000000 0x10000>;
sysreg@0 {
compatible = "arm,versatile-sysreg", "syscon";
compatible = "arm,versatile-sysreg", "syscon", "simple-mfd";
reg = <0x00000 0x1000>;
panel: display@0 {
compatible = "arm,versatile-tft-panel";
port {
panel_in: endpoint {
remote-endpoint = <&clcd_pads_panel>;
};
};
};
};
aaci@4000 {