drm/i915: Pass the cdclk state to the set_cdclk() functions
Rather than passing all the different parameters (cdclk,vco so far) sparately to the set_cdclk() functions, just pass the entire cdclk state. v2: Deal with churn v3: Drop the usless .ref assignment (Ander) Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Reviewed-by: Ander Conselvan de Oliveira <conselvan2@gmail.com> Link: http://patchwork.freedesktop.org/patch/msgid/20170120182205.8141-11-ville.syrjala@linux.intel.com
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3d5dbb10f3
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@ -485,8 +485,10 @@ static void vlv_program_pfi_credits(struct drm_i915_private *dev_priv)
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WARN_ON(I915_READ(GCI_CONTROL) & PFI_CREDIT_RESEND);
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}
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static void vlv_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
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static void vlv_set_cdclk(struct drm_i915_private *dev_priv,
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const struct intel_cdclk_state *cdclk_state)
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{
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int cdclk = cdclk_state->cdclk;
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u32 val, cmd;
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if (cdclk >= 320000) /* jump to highest voltage for 400MHz too */
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@ -547,8 +549,10 @@ static void vlv_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
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intel_update_cdclk(dev_priv);
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}
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static void chv_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
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static void chv_set_cdclk(struct drm_i915_private *dev_priv,
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const struct intel_cdclk_state *cdclk_state)
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{
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int cdclk = cdclk_state->cdclk;
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u32 val, cmd;
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switch (cdclk) {
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@ -616,8 +620,10 @@ static void bdw_get_cdclk(struct drm_i915_private *dev_priv,
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cdclk_state->cdclk = 675000;
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}
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static void bdw_set_cdclk(struct drm_i915_private *dev_priv, int cdclk)
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static void bdw_set_cdclk(struct drm_i915_private *dev_priv,
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const struct intel_cdclk_state *cdclk_state)
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{
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int cdclk = cdclk_state->cdclk;
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uint32_t val, data;
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int ret;
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@ -888,8 +894,10 @@ static void skl_dpll0_disable(struct drm_i915_private *dev_priv)
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}
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static void skl_set_cdclk(struct drm_i915_private *dev_priv,
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int cdclk, int vco)
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const struct intel_cdclk_state *cdclk_state)
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{
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int cdclk = cdclk_state->cdclk;
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int vco = cdclk_state->vco;
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u32 freq_select, pcu_ack;
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int ret;
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@ -1003,7 +1011,7 @@ sanitize:
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*/
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void skl_init_cdclk(struct drm_i915_private *dev_priv)
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{
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int cdclk, vco;
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struct intel_cdclk_state cdclk_state;
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skl_sanitize_cdclk(dev_priv);
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@ -1019,12 +1027,14 @@ void skl_init_cdclk(struct drm_i915_private *dev_priv)
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return;
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}
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vco = dev_priv->skl_preferred_vco_freq;
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if (vco == 0)
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vco = 8100000;
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cdclk = skl_calc_cdclk(0, vco);
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cdclk_state = dev_priv->cdclk.hw;
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skl_set_cdclk(dev_priv, cdclk, vco);
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cdclk_state.vco = dev_priv->skl_preferred_vco_freq;
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if (cdclk_state.vco == 0)
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cdclk_state.vco = 8100000;
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cdclk_state.cdclk = skl_calc_cdclk(0, cdclk_state.vco);
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skl_set_cdclk(dev_priv, &cdclk_state);
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}
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/**
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@ -1036,7 +1046,12 @@ void skl_init_cdclk(struct drm_i915_private *dev_priv)
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*/
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void skl_uninit_cdclk(struct drm_i915_private *dev_priv)
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{
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skl_set_cdclk(dev_priv, dev_priv->cdclk.hw.ref, 0);
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struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;
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cdclk_state.cdclk = cdclk_state.ref;
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cdclk_state.vco = 0;
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skl_set_cdclk(dev_priv, &cdclk_state);
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}
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static int bxt_calc_cdclk(int max_pixclk)
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@ -1200,8 +1215,10 @@ static void bxt_de_pll_enable(struct drm_i915_private *dev_priv, int vco)
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}
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static void bxt_set_cdclk(struct drm_i915_private *dev_priv,
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int cdclk, int vco)
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const struct intel_cdclk_state *cdclk_state)
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{
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int cdclk = cdclk_state->cdclk;
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int vco = cdclk_state->vco;
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u32 val, divider;
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int ret;
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@ -1336,7 +1353,7 @@ sanitize:
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*/
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void bxt_init_cdclk(struct drm_i915_private *dev_priv)
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{
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int cdclk, vco;
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struct intel_cdclk_state cdclk_state;
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bxt_sanitize_cdclk(dev_priv);
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@ -1344,20 +1361,22 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
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dev_priv->cdclk.hw.vco != 0)
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return;
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cdclk_state = dev_priv->cdclk.hw;
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/*
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* FIXME:
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* - The initial CDCLK needs to be read from VBT.
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* Need to make this change after VBT has changes for BXT.
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*/
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if (IS_GEMINILAKE(dev_priv)) {
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cdclk = glk_calc_cdclk(0);
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vco = glk_de_pll_vco(dev_priv, cdclk);
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cdclk_state.cdclk = glk_calc_cdclk(0);
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cdclk_state.vco = glk_de_pll_vco(dev_priv, cdclk_state.cdclk);
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} else {
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cdclk = bxt_calc_cdclk(0);
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vco = bxt_de_pll_vco(dev_priv, cdclk);
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cdclk_state.cdclk = bxt_calc_cdclk(0);
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cdclk_state.vco = bxt_de_pll_vco(dev_priv, cdclk_state.cdclk);
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}
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bxt_set_cdclk(dev_priv, cdclk, vco);
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bxt_set_cdclk(dev_priv, &cdclk_state);
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}
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/**
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@ -1369,7 +1388,12 @@ void bxt_init_cdclk(struct drm_i915_private *dev_priv)
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*/
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void bxt_uninit_cdclk(struct drm_i915_private *dev_priv)
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{
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bxt_set_cdclk(dev_priv, dev_priv->cdclk.hw.ref, 0);
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struct intel_cdclk_state cdclk_state = dev_priv->cdclk.hw;
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cdclk_state.cdclk = cdclk_state.ref;
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cdclk_state.vco = 0;
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bxt_set_cdclk(dev_priv, &cdclk_state);
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}
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/**
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@ -1483,7 +1507,6 @@ static int vlv_modeset_calc_cdclk(struct drm_atomic_state *state)
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static void vlv_modeset_commit_cdclk(struct drm_atomic_state *old_state)
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{
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struct drm_i915_private *dev_priv = to_i915(old_state->dev);
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unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;
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/*
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* FIXME: We can end up here with all power domains off, yet
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@ -1497,9 +1520,9 @@ static void vlv_modeset_commit_cdclk(struct drm_atomic_state *old_state)
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intel_display_power_get(dev_priv, POWER_DOMAIN_PIPE_A);
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if (IS_CHERRYVIEW(dev_priv))
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chv_set_cdclk(dev_priv, req_cdclk);
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chv_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
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else
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vlv_set_cdclk(dev_priv, req_cdclk);
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vlv_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
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vlv_program_pfi_credits(dev_priv);
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@ -1542,9 +1565,8 @@ static int bdw_modeset_calc_cdclk(struct drm_atomic_state *state)
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static void bdw_modeset_commit_cdclk(struct drm_atomic_state *old_state)
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{
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struct drm_i915_private *dev_priv = to_i915(old_state->dev);
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unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;
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bdw_set_cdclk(dev_priv, req_cdclk);
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bdw_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
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}
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static int skl_modeset_calc_cdclk(struct drm_atomic_state *state)
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@ -1589,10 +1611,8 @@ static int skl_modeset_calc_cdclk(struct drm_atomic_state *state)
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static void skl_modeset_commit_cdclk(struct drm_atomic_state *old_state)
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{
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struct drm_i915_private *dev_priv = to_i915(old_state->dev);
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unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;
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unsigned int req_vco = dev_priv->cdclk.actual.vco;
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skl_set_cdclk(dev_priv, req_cdclk, req_vco);
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skl_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
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}
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static int bxt_modeset_calc_cdclk(struct drm_atomic_state *state)
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static void bxt_modeset_commit_cdclk(struct drm_atomic_state *old_state)
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{
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struct drm_i915_private *dev_priv = to_i915(old_state->dev);
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unsigned int req_cdclk = dev_priv->cdclk.actual.cdclk;
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unsigned int req_vco = dev_priv->cdclk.actual.vco;
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bxt_set_cdclk(dev_priv, req_cdclk, req_vco);
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bxt_set_cdclk(dev_priv, &dev_priv->cdclk.actual);
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}
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static int intel_compute_max_dotclk(struct drm_i915_private *dev_priv)
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