From e66104096a5630e75d135dc052867d32470c0bbc Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:33 +0900 Subject: [PATCH 01/66] dt-bindings: clock: Fix node descriptions in uniphier-clock example Prior to adding dt-bindings for SoC-dependent controllers, rename the clock nodes to the generic names in the example. And drop redundant examples and a parent node of the clock as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-2-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../clock/socionext,uniphier-clock.yaml | 39 ++----------------- 1 file changed, 3 insertions(+), 36 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml index 9a0cc7341630..4e82582fb2f3 100644 --- a/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml +++ b/Documentation/devicetree/bindings/clock/socionext,uniphier-clock.yaml @@ -61,40 +61,7 @@ required: examples: - | - sysctrl@61840000 { - compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon"; - reg = <0x61840000 0x4000>; - - clock { - compatible = "socionext,uniphier-ld11-clock"; - #clock-cells = <1>; - }; - - // other nodes ... - }; - - - | - mioctrl@59810000 { - compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - - clock { - compatible = "socionext,uniphier-ld11-mio-clock"; - #clock-cells = <1>; - }; - - // other nodes ... - }; - - - | - perictrl@59820000 { - compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - - clock { - compatible = "socionext,uniphier-ld11-peri-clock"; - #clock-cells = <1>; - }; - - // other nodes ... + clock-controller { + compatible = "socionext,uniphier-ld11-clock"; + #clock-cells = <1>; }; From 3b67e62130dfd01f520697cbe4341be145a31ae8 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:34 +0900 Subject: [PATCH 02/66] dt-bindings: reset: Fix node descriptions in uniphier-reset example Prior to adding dt-bindings for SoC-dependent controllers, rename the reset nodes to the generic names in the example. And drop redundant examples and a parent node of the reset as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-3-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../reset/socionext,uniphier-glue-reset.yaml | 23 +++----- .../reset/socionext,uniphier-reset.yaml | 52 ++----------------- 2 files changed, 11 insertions(+), 64 deletions(-) diff --git a/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml b/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml index 0a2c13e1e230..fa253c518d79 100644 --- a/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml +++ b/Documentation/devicetree/bindings/reset/socionext,uniphier-glue-reset.yaml @@ -95,19 +95,12 @@ required: examples: - | - usb-glue@65b00000 { - compatible = "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - - usb_rst: reset@0 { - compatible = "socionext,uniphier-ld20-usb3-reset"; - reg = <0x0 0x4>; - #reset-cells = <1>; - clock-names = "link"; - clocks = <&sys_clk 14>; - reset-names = "link"; - resets = <&sys_rst 14>; - }; + usb_rst: reset-controller@0 { + compatible = "socionext,uniphier-ld20-usb3-reset"; + reg = <0x0 0x4>; + #reset-cells = <1>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; }; diff --git a/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml b/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml index 6566804ec567..033b252a3dfe 100644 --- a/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml +++ b/Documentation/devicetree/bindings/reset/socionext,uniphier-reset.yaml @@ -66,53 +66,7 @@ required: examples: - | - sysctrl@61840000 { - compatible = "socionext,uniphier-sysctrl", "simple-mfd", "syscon"; - reg = <0x61840000 0x4000>; - - reset { - compatible = "socionext,uniphier-ld11-reset"; - #reset-cells = <1>; - }; - - // other nodes ... - }; - - - | - mioctrl@59810000 { - compatible = "socionext,uniphier-mioctrl", "simple-mfd", "syscon"; - reg = <0x59810000 0x800>; - - reset { - compatible = "socionext,uniphier-ld11-mio-reset"; - #reset-cells = <1>; - }; - - // other nodes ... - }; - - - | - perictrl@59820000 { - compatible = "socionext,uniphier-perictrl", "simple-mfd", "syscon"; - reg = <0x59820000 0x200>; - - reset { - compatible = "socionext,uniphier-ld11-peri-reset"; - #reset-cells = <1>; - }; - - // other nodes ... - }; - - - | - adamv@57920000 { - compatible = "socionext,uniphier-ld11-adamv", "simple-mfd", "syscon"; - reg = <0x57920000 0x1000>; - - reset { - compatible = "socionext,uniphier-ld11-adamv-reset"; - #reset-cells = <1>; - }; - - // other nodes ... + reset-controller { + compatible = "socionext,uniphier-ld11-reset"; + #reset-cells = <1>; }; From 3fa1306d6a7f9baddc960ef8c5b5edde6dc46e66 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:35 +0900 Subject: [PATCH 03/66] dt-bindings: pinctrl: Fix node descriptions in uniphier-pinctrl example Drop parent node of the pinctrl as it is not directly necessary, and add more examples, that is "groups", "function", and a child node to set pin attributes, to express this pinctrl node in detail. Signed-off-by: Kunihiko Hayashi Link: https://lore.kernel.org/r/20221213082449.2721-4-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../pinctrl/socionext,uniphier-pinctrl.yaml | 17 ++++++++++++----- 1 file changed, 12 insertions(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml index 14a8c0215cc6..bc34e2c872bc 100644 --- a/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml +++ b/Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml @@ -1,4 +1,5 @@ # SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause + %YAML 1.2 --- $id: http://devicetree.org/schemas/pinctrl/socionext,uniphier-pinctrl.yaml# @@ -69,11 +70,17 @@ examples: - | // The UniPhier pinctrl should be a subnode of a "syscon" compatible node. - soc-glue@5f800000 { - compatible = "socionext,uniphier-pro4-soc-glue", "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; + pinctrl { + compatible = "socionext,uniphier-ld20-pinctrl"; - pinctrl: pinctrl { - compatible = "socionext,uniphier-pro4-pinctrl"; + pinctrl_ether_rgmii: ether-rgmii { + groups = "ether_rgmii"; + function = "ether_rgmii"; + + tx { + pins = "RGMII_TXCLK", "RGMII_TXD0", "RGMII_TXD1", + "RGMII_TXD2", "RGMII_TXD3", "RGMII_TXCTL"; + drive-strength = <9>; + }; }; }; From d3df7f06e2a63780164aa2442ea7b639acc898bd Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:36 +0900 Subject: [PATCH 04/66] dt-bindings: regulator: Fix node descriptions in uniphier-regulator example Drop a parent node of the regulator as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-5-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext,uniphier-regulator.yaml | 21 +++++++------------ 1 file changed, 7 insertions(+), 14 deletions(-) diff --git a/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml b/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml index c0acf949753d..a6949a581cd1 100644 --- a/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml +++ b/Documentation/devicetree/bindings/regulator/socionext,uniphier-regulator.yaml @@ -89,18 +89,11 @@ required: examples: - | - usb-glue@65b00000 { - compatible = "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - - usb_vbus0: regulators@100 { - compatible = "socionext,uniphier-ld20-usb3-regulator"; - reg = <0x100 0x10>; - clock-names = "link"; - clocks = <&sys_clk 14>; - reset-names = "link"; - resets = <&sys_rst 14>; - }; + usb_vbus0: regulators@100 { + compatible = "socionext,uniphier-ld20-usb3-regulator"; + reg = <0x100 0x10>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; }; From 8f31aa56efe6d35d5923218ca9fd5354f2c5e76d Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:37 +0900 Subject: [PATCH 05/66] dt-bindings: watchdog: Fix node descriptions in uniphier-wdt example Drop a parent node of the watchdog as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-6-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../bindings/watchdog/socionext,uniphier-wdt.yaml | 10 ++-------- 1 file changed, 2 insertions(+), 8 deletions(-) diff --git a/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml b/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml index 90698cfa8f94..70c005fdd197 100644 --- a/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml +++ b/Documentation/devicetree/bindings/watchdog/socionext,uniphier-wdt.yaml @@ -25,12 +25,6 @@ examples: - | // The UniPhier watchdog should be a subnode of a "syscon" compatible node. - sysctrl@61840000 { - compatible = "socionext,uniphier-ld11-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - - watchdog { - compatible = "socionext,uniphier-wdt"; - }; + watchdog { + compatible = "socionext,uniphier-wdt"; }; From a1e616a5fccbef72e02b68ef0f43e4e829604faf Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:38 +0900 Subject: [PATCH 06/66] dt-bindings: thermal: Fix node descriptions in uniphier-thermal example Prior to adding dt-bindings for SoC-dependent controllers, rename the thermal node and its parent node to the generic names in the example. And drop a parent node of the thermal-sensor as it is not directly necessary. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-7-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../thermal/socionext,uniphier-thermal.yaml | 15 +++++---------- 1 file changed, 5 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml b/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml index c5b25ce44956..6f975821fa5e 100644 --- a/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml +++ b/Documentation/devicetree/bindings/thermal/socionext,uniphier-thermal.yaml @@ -46,14 +46,9 @@ examples: - | // The UniPhier thermal should be a subnode of a "syscon" compatible node. - sysctrl@61840000 { - compatible = "socionext,uniphier-ld20-sysctrl", - "simple-mfd", "syscon"; - reg = <0x61840000 0x10000>; - - pvtctl: thermal { - compatible = "socionext,uniphier-ld20-thermal"; - interrupts = <0 3 1>; - #thermal-sensor-cells = <0>; - }; + #include + pvtctl: thermal-sensor { + compatible = "socionext,uniphier-ld20-thermal"; + interrupts = ; + #thermal-sensor-cells = <0>; }; From 4278eabebc1679709d6b1904ca960dc0b69a6c99 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:39 +0900 Subject: [PATCH 07/66] dt-bindings: phy: Fix node descriptions in uniphier-phy example Prior to adding dt-bindings for SoC-dependent controllers, rename the phy nodes and their parent nodes to the generic names in the example. And drop parent nodes of each phy as they are not directly necessary here. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski ] Link: https://lore.kernel.org/r/20221213082449.2721-8-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../phy/socionext,uniphier-ahci-phy.yaml | 24 +++++-------- .../phy/socionext,uniphier-usb2-phy.yaml | 35 ++++++++----------- .../phy/socionext,uniphier-usb3hs-phy.yaml | 29 ++++++--------- .../phy/socionext,uniphier-usb3ss-phy.yaml | 26 +++++--------- 4 files changed, 43 insertions(+), 71 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml index a3cd45acea28..de3cffc850bc 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-ahci-phy.yaml @@ -117,20 +117,12 @@ additionalProperties: false examples: - | - ahci-glue@65700000 { - compatible = "socionext,uniphier-pxs3-ahci-glue", - "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65700000 0x100>; - - ahci_phy: phy@10 { - compatible = "socionext,uniphier-pxs3-ahci-phy"; - reg = <0x10 0x10>; - #phy-cells = <0>; - clock-names = "link", "phy"; - clocks = <&sys_clk 28>, <&sys_clk 30>; - reset-names = "link", "phy"; - resets = <&sys_rst 28>, <&sys_rst 30>; - }; + ahci_phy: phy@10 { + compatible = "socionext,uniphier-pxs3-ahci-phy"; + reg = <0x10 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 28>, <&sys_clk 30>; + reset-names = "link", "phy"; + resets = <&sys_rst 28>, <&sys_rst 30>; }; diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml index 63dab914a48d..19522c54f448 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb2-phy.yaml @@ -61,28 +61,23 @@ examples: - | // The UniPhier usb2-phy should be a subnode of a "syscon" compatible node. - soc-glue@5f800000 { - compatible = "socionext,uniphier-ld11-soc-glue", "simple-mfd", "syscon"; - reg = <0x5f800000 0x2000>; + usb-hub { + compatible = "socionext,uniphier-ld11-usb2-phy"; + #address-cells = <1>; + #size-cells = <0>; - usb-controller { - compatible = "socionext,uniphier-ld11-usb2-phy"; - #address-cells = <1>; - #size-cells = <0>; + usb_phy0: phy@0 { + reg = <0>; + #phy-cells = <0>; + }; - usb_phy0: phy@0 { - reg = <0>; - #phy-cells = <0>; - }; + usb_phy1: phy@1 { + reg = <1>; + #phy-cells = <0>; + }; - usb_phy1: phy@1 { - reg = <1>; - #phy-cells = <0>; - }; - - usb_phy2: phy@2 { - reg = <2>; - #phy-cells = <0>; - }; + usb_phy2: phy@2 { + reg = <2>; + #phy-cells = <0>; }; }; diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml index 21e4414eea60..2107d98ace15 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3hs-phy.yaml @@ -146,22 +146,15 @@ additionalProperties: false examples: - | - usb-glue@65b00000 { - compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - - usb_hsphy0: hs-phy@200 { - compatible = "socionext,uniphier-ld20-usb3-hsphy"; - reg = <0x200 0x10>; - #phy-cells = <0>; - clock-names = "link", "phy"; - clocks = <&sys_clk 14>, <&sys_clk 16>; - reset-names = "link", "phy"; - resets = <&sys_rst 14>, <&sys_rst 16>; - vbus-supply = <&usb_vbus0>; - nvmem-cell-names = "rterm", "sel_t", "hs_i"; - nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, <&usb_hs_i0>; - }; + usb_hsphy0: phy@200 { + compatible = "socionext,uniphier-ld20-usb3-hsphy"; + reg = <0x200 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 16>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 16>; + vbus-supply = <&usb_vbus0>; + nvmem-cell-names = "rterm", "sel_t", "hs_i"; + nvmem-cells = <&usb_rterm0>, <&usb_sel_t0>, <&usb_hs_i0>; }; diff --git a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml index 4c26d2d2303d..8f5aa6238bf3 100644 --- a/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml +++ b/Documentation/devicetree/bindings/phy/socionext,uniphier-usb3ss-phy.yaml @@ -131,21 +131,13 @@ additionalProperties: false examples: - | - usb-glue@65b00000 { - compatible = "socionext,uniphier-ld20-dwc3-glue", - "simple-mfd"; - #address-cells = <1>; - #size-cells = <1>; - ranges = <0 0x65b00000 0x400>; - - usb_ssphy0: ss-phy@300 { - compatible = "socionext,uniphier-ld20-usb3-ssphy"; - reg = <0x300 0x10>; - #phy-cells = <0>; - clock-names = "link", "phy"; - clocks = <&sys_clk 14>, <&sys_clk 16>; - reset-names = "link", "phy"; - resets = <&sys_rst 14>, <&sys_rst 16>; - vbus-supply = <&usb_vbus0>; - }; + usb_ssphy0: phy@300 { + compatible = "socionext,uniphier-ld20-usb3-ssphy"; + reg = <0x300 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 16>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 16>; + vbus-supply = <&usb_vbus0>; }; From e8c650f62787437f822bffa3c384ab1029d43ea7 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:40 +0900 Subject: [PATCH 08/66] dt-bindings: nvmem: Fix node descriptions in uniphier-efuse example Prior to adding dt-bindings for SoC-dependent controllers, rename the parent node to the generic name in the example. And drop a parent node of the nvmem as it is not directly necessary here. Signed-off-by: Kunihiko Hayashi Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-9-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../nvmem/socionext,uniphier-efuse.yaml | 101 ++++++++---------- 1 file changed, 46 insertions(+), 55 deletions(-) diff --git a/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml b/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml index 73a0c658dbfd..dc790d2cd9f0 100644 --- a/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml +++ b/Documentation/devicetree/bindings/nvmem/socionext,uniphier-efuse.yaml @@ -31,65 +31,56 @@ unevaluatedProperties: false examples: - | - // The UniPhier eFuse should be a subnode of a "soc-glue" node. + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; - soc-glue@5f900000 { - compatible = "simple-mfd"; + efuse@200 { + compatible = "socionext,uniphier-efuse"; + reg = <0x200 0x68>; #address-cells = <1>; #size-cells = <1>; - ranges = <0x0 0x5f900000 0x2000>; - efuse@100 { - compatible = "socionext,uniphier-efuse"; - reg = <0x100 0x28>; + /* Data cells */ + usb_rterm0: trim@54,4 { + reg = <0x54 1>; + bits = <4 2>; }; - - efuse@200 { - compatible = "socionext,uniphier-efuse"; - reg = <0x200 0x68>; - #address-cells = <1>; - #size-cells = <1>; - - /* Data cells */ - usb_rterm0: trim@54,4 { - reg = <0x54 1>; - bits = <4 2>; - }; - usb_rterm1: trim@55,4 { - reg = <0x55 1>; - bits = <4 2>; - }; - usb_rterm2: trim@58,4 { - reg = <0x58 1>; - bits = <4 2>; - }; - usb_rterm3: trim@59,4 { - reg = <0x59 1>; - bits = <4 2>; - }; - usb_sel_t0: trim@54,0 { - reg = <0x54 1>; - bits = <0 4>; - }; - usb_sel_t1: trim@55,0 { - reg = <0x55 1>; - bits = <0 4>; - }; - usb_sel_t2: trim@58,0 { - reg = <0x58 1>; - bits = <0 4>; - }; - usb_sel_t3: trim@59,0 { - reg = <0x59 1>; - bits = <0 4>; - }; - usb_hs_i0: trim@56,0 { - reg = <0x56 1>; - bits = <0 4>; - }; - usb_hs_i2: trim@5a,0 { - reg = <0x5a 1>; - bits = <0 4>; - }; + usb_rterm1: trim@55,4 { + reg = <0x55 1>; + bits = <4 2>; + }; + usb_rterm2: trim@58,4 { + reg = <0x58 1>; + bits = <4 2>; + }; + usb_rterm3: trim@59,4 { + reg = <0x59 1>; + bits = <4 2>; + }; + usb_sel_t0: trim@54,0 { + reg = <0x54 1>; + bits = <0 4>; + }; + usb_sel_t1: trim@55,0 { + reg = <0x55 1>; + bits = <0 4>; + }; + usb_sel_t2: trim@58,0 { + reg = <0x58 1>; + bits = <0 4>; + }; + usb_sel_t3: trim@59,0 { + reg = <0x59 1>; + bits = <0 4>; + }; + usb_hs_i0: trim@56,0 { + reg = <0x56 1>; + bits = <0 4>; + }; + usb_hs_i2: trim@5a,0 { + reg = <0x5a 1>; + bits = <0 4>; }; }; From 75c7aaa66f5fdabcbaf1e6775c5f85b35b7debaa Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:41 +0900 Subject: [PATCH 09/66] dt-bindings: soc: socionext: Add UniPhier system controller Add devicetree binding schema for the system controller implemented on Socionext Uniphier SoCs. This system controller has multiple functions such as clock control, reset control, internal watchdog timer, thermal management, and so on. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-10-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext/socionext,uniphier-sysctrl.yaml | 104 ++++++++++++++++++ MAINTAINERS | 1 + 2 files changed, 105 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml new file mode 100644 index 000000000000..3acb14201d1a --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sysctrl.yaml @@ -0,0 +1,104 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sysctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier system controller + +maintainers: + - Kunihiko Hayashi + +description: |+ + System controller implemented on Socionext UniPhier SoCs has multiple + functions such as clock control, reset control, internal watchdog timer, + thermal management, and so on. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-sysctrl + - socionext,uniphier-pro4-sysctrl + - socionext,uniphier-pro5-sysctrl + - socionext,uniphier-pxs2-sysctrl + - socionext,uniphier-sld8-sysctrl + - socionext,uniphier-ld11-sysctrl + - socionext,uniphier-ld20-sysctrl + - socionext,uniphier-pxs3-sysctrl + - socionext,uniphier-nx1-sysctrl + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + + watchdog: + $ref: /schemas/watchdog/socionext,uniphier-wdt.yaml# + + thermal-sensor: + $ref: /schemas/thermal/socionext,uniphier-thermal.yaml# + +allOf: + - if: + properties: + compatible: + contains: + const: socionext,uniphier-ld4-sysctrl + then: + properties: + watchdog: false + + - if: + properties: + compatible: + contains: + enum: + - socionext,uniphier-ld4-sysctrl + - socionext,uniphier-pro4-sysctrl + - socionext,uniphier-sld8-sysctrl + - socionext,uniphier-ld11-sysctrl + then: + properties: + thermal-sensor: false + +additionalProperties: false + +required: + - compatible + - reg + +examples: + - | + #include + syscon@61840000 { + compatible = "socionext,uniphier-ld20-sysctrl", + "simple-mfd", "syscon"; + reg = <0x61840000 0x4000>; + + clock-controller { + compatible = "socionext,uniphier-ld20-clock"; + #clock-cells = <1>; + }; + + reset-controller { + compatible = "socionext,uniphier-ld20-reset"; + #reset-cells = <1>; + }; + + watchdog { + compatible = "socionext,uniphier-wdt"; + }; + + thermal-sensor { + compatible = "socionext,uniphier-ld20-thermal"; + interrupts = ; + #thermal-sensor-cells = <0>; + }; + }; diff --git a/MAINTAINERS b/MAINTAINERS index f61eb221415b..5035336998a3 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -3103,6 +3103,7 @@ S: Maintained F: Documentation/devicetree/bindings/arm/socionext/uniphier.yaml F: Documentation/devicetree/bindings/gpio/socionext,uniphier-gpio.yaml F: Documentation/devicetree/bindings/pinctrl/socionext,uniphier-pinctrl.yaml +F: Documentation/devicetree/bindings/soc/socionext/socionext,uniphier*.yaml F: arch/arm/boot/dts/uniphier* F: arch/arm/include/asm/hardware/cache-uniphier.h F: arch/arm/mach-uniphier/ From 0611adff8b3a9f8e6217a643506451162726de3a Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:42 +0900 Subject: [PATCH 10/66] dt-bindings: soc: socionext: Add UniPhier SoC-glue logic Add devicetree binding schema for the SoC-glue logic implemented on Socionext Uniphier SoCs. This SoC-glue logic is a set of miscellaneous function registers handling signals for specific devices outside system components, and also has multiple functions such as I/O pinmux, usb-phy, debug, clock-mux for a specific SoC, and so on. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-11-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext,uniphier-soc-glue.yaml | 115 ++++++++++++++++++ 1 file changed, 115 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml new file mode 100644 index 000000000000..4b6852db4747 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml @@ -0,0 +1,115 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SoC-glue logic + +maintainers: + - Kunihiko Hayashi + +description: |+ + SoC-glue logic implemented on Socionext UniPhier SoCs is a collection of + miscellaneous function registers handling signals outside system components. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-soc-glue + - socionext,uniphier-pro4-soc-glue + - socionext,uniphier-pro5-soc-glue + - socionext,uniphier-pxs2-soc-glue + - socionext,uniphier-sld8-soc-glue + - socionext,uniphier-ld11-soc-glue + - socionext,uniphier-ld20-soc-glue + - socionext,uniphier-pxs3-soc-glue + - socionext,uniphier-nx1-soc-glue + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + +patternProperties: + pinctrl: + $ref: /schemas/pinctrl/socionext,uniphier-pinctrl.yaml# + + usb-hub: + $ref: /schemas/phy/socionext,uniphier-usb2-phy.yaml# + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + +allOf: + - if: + not: + properties: + compatible: + contains: + enum: + - socionext,uniphier-pro4-soc-glue + - socionext,uniphier-ld11-soc-glue + then: + properties: + usb-hub: false + + - if: + not: + properties: + compatible: + contains: + const: socionext,uniphier-pro4-soc-glue + then: + properties: + clock-controller: false + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@5f800000 { + compatible = "socionext,uniphier-pro4-soc-glue", + "simple-mfd", "syscon"; + reg = <0x5f800000 0x2000>; + + pinctrl { + compatible = "socionext,uniphier-pro4-pinctrl"; + }; + + usb-hub { + compatible = "socionext,uniphier-pro4-usb2-phy"; + #address-cells = <1>; + #size-cells = <0>; + + phy@0 { + reg = <0>; + #phy-cells = <0>; + }; + + phy@1 { + reg = <1>; + #phy-cells = <0>; + }; + + phy@2 { + reg = <2>; + #phy-cells = <0>; + }; + + phy@3 { + reg = <3>; + #phy-cells = <0>; + }; + }; + + clock-controller { + compatible = "socionext,uniphier-pro4-sg-clock"; + #clock-cells = <1>; + }; + }; From ddbbb9766b85d736e5bf5ed607e0862a952691d7 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:43 +0900 Subject: [PATCH 11/66] dt-bindings: soc: socionext: Add UniPhier SoC-glue logic debug part Add devicetree binding schema for the SoC-glue logic debug part implemented on Socionext Uniphier SoCs. This SoC-glue logic debug part is a set of miscellaneous function registers handling signals for specific devices outside system components, and also has multiple functions such as efuse, debug unit, several monitors for specific SoC, and so on. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-12-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext,uniphier-soc-glue-debug.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml new file mode 100644 index 000000000000..1341544d1df5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue-debug.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-soc-glue-debug.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SoC-glue logic debug part + +maintainers: + - Kunihiko Hayashi + +description: |+ + SoC-glue logic debug part implemented on Socionext UniPhier SoCs is + a collection of miscellaneous function registers handling signals outside + system components for debug and monitor use. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-soc-glue-debug + - socionext,uniphier-pro4-soc-glue-debug + - socionext,uniphier-pro5-soc-glue-debug + - socionext,uniphier-pxs2-soc-glue-debug + - socionext,uniphier-sld8-soc-glue-debug + - socionext,uniphier-ld11-soc-glue-debug + - socionext,uniphier-ld20-soc-glue-debug + - socionext,uniphier-pxs3-soc-glue-debug + - socionext,uniphier-nx1-soc-glue-debug + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "^efuse@[0-9a-f]+$": + $ref: /schemas/nvmem/socionext,uniphier-efuse.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@5f900000 { + compatible = "socionext,uniphier-pxs2-soc-glue-debug", + "simple-mfd", "syscon"; + reg = <0x5f900000 0x2000>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x5f900000 0x2000>; + + efuse@100 { + compatible = "socionext,uniphier-efuse"; + reg = <0x100 0x28>; + }; + }; From 9fb31379f061b7130a244dd0ff58e0f0cf0ca495 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:44 +0900 Subject: [PATCH 12/66] dt-bindings: soc: socionext: Add UniPhier peripheral block Add devicetree binding schema for the peripheral block implemented on Socionext Uniphier SoCs. Peripheral block implemented on Socionext UniPhier SoCs is an integrated component of the peripherals including UART, I2C/FI2C, and SCSSI. Peripheral block has some function logics to control the component. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-13-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext,uniphier-perictrl.yaml | 64 +++++++++++++++++++ 1 file changed, 64 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml new file mode 100644 index 000000000000..0adcffe859ab --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-perictrl.yaml @@ -0,0 +1,64 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-perictrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier peripheral block controller + +maintainers: + - Kunihiko Hayashi + +description: |+ + Peripheral block implemented on Socionext UniPhier SoCs is an integrated + component of the peripherals including UART, I2C/FI2C, and SCSSI. + Peripheral block controller is a logic to control the component. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-perictrl + - socionext,uniphier-pro4-perictrl + - socionext,uniphier-pro5-perictrl + - socionext,uniphier-pxs2-perictrl + - socionext,uniphier-sld8-perictrl + - socionext,uniphier-ld11-perictrl + - socionext,uniphier-ld20-perictrl + - socionext,uniphier-pxs3-perictrl + - socionext,uniphier-nx1-perictrl + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@59820000 { + compatible = "socionext,uniphier-ld20-perictrl", + "simple-mfd", "syscon"; + reg = <0x59820000 0x200>; + + clock-controller { + compatible = "socionext,uniphier-ld20-peri-clock"; + #clock-cells = <1>; + }; + + reset-controller { + compatible = "socionext,uniphier-ld20-peri-reset"; + #reset-cells = <1>; + }; + }; From b3ad9754505ab717915d4e644e78e7d7888f4ef1 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:45 +0900 Subject: [PATCH 13/66] dt-bindings: soc: socionext: Add UniPhier media I/O block Add devicetree binding schema for the media I/O block implemented on Socionext Uniphier SoCs. This block is implemented on LD4, sLD8, Pro4, and LD11 SoCs. Media I/O block implemented on Socionext UniPhier SoCs is an integrated component of the stream type peripherals including SD, USB2.0, eMMC, and MIO-DMAC. Media I/O block has a common logic to control the component. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-14-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext/socionext,uniphier-mioctrl.yaml | 65 +++++++++++++++++++ 1 file changed, 65 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml new file mode 100644 index 000000000000..2cc38bb5038e --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-mioctrl.yaml @@ -0,0 +1,65 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-mioctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier media I/O block (MIO) controller + +maintainers: + - Kunihiko Hayashi + +description: |+ + Media I/O block implemented on Socionext UniPhier SoCs is a legacy + integrated component of the stream type peripherals including USB2.0, + SD/eMMC, and MIO-DMAC. + Media I/O block has a common logic to control the component. + + Recent SoCs have SD interface logic specialized only for SD functions + as a subset of media I/O block. See socionext,uniphier-sdctrl.yaml. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld4-mioctrl + - socionext,uniphier-pro4-mioctrl + - socionext,uniphier-sld8-mioctrl + - socionext,uniphier-ld11-mioctrl + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@5b3e0000 { + compatible = "socionext,uniphier-ld11-mioctrl", + "simple-mfd", "syscon"; + reg = <0x5b3e0000 0x800>; + + clock-controller { + compatible = "socionext,uniphier-ld11-mio-clock"; + #clock-cells = <1>; + }; + + reset-controller { + compatible = "socionext,uniphier-ld11-mio-reset"; + #reset-cells = <1>; + resets = <&sys_rst 7>; + }; + }; + From 6796f54e8143671deb13701d122f6f029def853b Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:46 +0900 Subject: [PATCH 14/66] dt-bindings: soc: socionext: Add UniPhier SD interface block Add devicetree binding schema for the SD interface block implemented on Socionext Uniphier SoCs. This SD interface block is attached outside SDHC, and has some SD related functions such as clock control, reset control, mode switch, and so on. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-15-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext/socionext,uniphier-sdctrl.yaml | 61 +++++++++++++++++++ 1 file changed, 61 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml new file mode 100644 index 000000000000..cb3b0d42739f --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-sdctrl.yaml @@ -0,0 +1,61 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-sdctrl.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SD interface logic + +maintainers: + - Kunihiko Hayashi + +description: |+ + SD interface logic implemented on Socionext UniPhier SoCs is + attached outside SDHC, and has some SD related functions such as + clock control, reset control, mode switch, and so on. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-pro5-sdctrl + - socionext,uniphier-pxs2-sdctrl + - socionext,uniphier-ld11-sdctrl + - socionext,uniphier-ld20-sdctrl + - socionext,uniphier-pxs3-sdctrl + - socionext,uniphier-nx1-sdctrl + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + clock-controller: + $ref: /schemas/clock/socionext,uniphier-clock.yaml# + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@59810000 { + compatible = "socionext,uniphier-ld20-sdctrl", + "simple-mfd", "syscon"; + reg = <0x59810000 0x400>; + + clock-controller { + compatible = "socionext,uniphier-ld20-sd-clock"; + #clock-cells = <1>; + }; + + reset-controller { + compatible = "socionext,uniphier-ld20-sd-reset"; + #reset-cells = <1>; + }; + }; From 0c00d8d315f09ef8639369a7f12e270b7a86bf79 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:47 +0900 Subject: [PATCH 15/66] dt-bindings: soc: socionext: Add UniPhier ADAMV block Add devicetree binding schema for the ADAMV block implemented on Socionext Uniphier SoCs. The ADAMV block is analog signal amplifier that is a part of the external video and audio I/O system. This block is implemented on LD11 and LD20, and this is defined for controlling audio I/O reset only. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-16-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext/socionext,uniphier-adamv.yaml | 50 +++++++++++++++++++ 1 file changed, 50 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml new file mode 100644 index 000000000000..32d9cc2d72a8 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-adamv.yaml @@ -0,0 +1,50 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-adamv.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier ADAMV block + +maintainers: + - Kunihiko Hayashi + +description: |+ + ADAMV block implemented on Socionext UniPhier SoCs is an analog signal + amplifier that is a part of the external video and audio I/O system. + + This block is defined for controlling audio I/O reset only. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-ld11-adamv + - socionext,uniphier-ld20-adamv + - const: simple-mfd + - const: syscon + + reg: + maxItems: 1 + + reset-controller: + $ref: /schemas/reset/socionext,uniphier-reset.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + syscon@57920000 { + compatible = "socionext,uniphier-ld20-adamv", + "simple-mfd", "syscon"; + reg = <0x57920000 0x1000>; + + reset-controller { + compatible = "socionext,uniphier-ld20-adamv-reset"; + #reset-cells = <1>; + }; + }; From 5993f6bd555e2696bb4d79cf54b976cb58793534 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:48 +0900 Subject: [PATCH 16/66] dt-bindings: soc: socionext: Add UniPhier DWC3 USB glue layer Add DT binding schema for components belonging to the platform-specific DWC3 USB glue layer implemented in UniPhier SoCs. This USB glue layer works as a sideband logic for the host controller, including core reset, vbus control, PHYs, and some signals to the controller. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-17-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext,uniphier-dwc3-glue.yaml | 106 ++++++++++++++++++ 1 file changed, 106 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml new file mode 100644 index 000000000000..bd0def7236b5 --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-dwc3-glue.yaml @@ -0,0 +1,106 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-dwc3-glue.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SoC DWC3 USB3.0 glue layer + +maintainers: + - Kunihiko Hayashi + +description: |+ + DWC3 USB3.0 glue layer implemented on Socionext UniPhier SoCs is + a sideband logic handling signals to DWC3 host controller inside + USB3.0 component. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-pro4-dwc3-glue + - socionext,uniphier-pro5-dwc3-glue + - socionext,uniphier-pxs2-dwc3-glue + - socionext,uniphier-ld20-dwc3-glue + - socionext,uniphier-pxs3-dwc3-glue + - socionext,uniphier-nx1-dwc3-glue + - const: simple-mfd + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "^reset-controller@[0-9a-f]+$": + $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml# + + "^regulator@[0-9a-f]+$": + $ref: /schemas/regulator/socionext,uniphier-regulator.yaml# + + "^phy@[0-9a-f]+$": + oneOf: + - $ref: /schemas/phy/socionext,uniphier-usb3hs-phy.yaml# + - $ref: /schemas/phy/socionext,uniphier-usb3ss-phy.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + usb@65b00000 { + compatible = "socionext,uniphier-ld20-dwc3-glue", "simple-mfd"; + reg = <0x65b00000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65b00000 0x400>; + + reset-controller@0 { + compatible = "socionext,uniphier-ld20-usb3-reset"; + reg = <0x0 0x4>; + #reset-cells = <1>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; + }; + + regulator@100 { + compatible = "socionext,uniphier-ld20-usb3-regulator"; + reg = <0x100 0x10>; + clock-names = "link"; + clocks = <&sys_clk 14>; + reset-names = "link"; + resets = <&sys_rst 14>; + }; + + phy@200 { + compatible = "socionext,uniphier-ld20-usb3-hsphy"; + reg = <0x200 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 16>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 16>; + }; + + phy@300 { + compatible = "socionext,uniphier-ld20-usb3-ssphy"; + reg = <0x300 0x10>; + #phy-cells = <0>; + clock-names = "link", "phy"; + clocks = <&sys_clk 14>, <&sys_clk 18>; + reset-names = "link", "phy"; + resets = <&sys_rst 14>, <&sys_rst 18>; + }; + }; + From 9e699b8985e62c93cb1ca84b27197b5c1cdbd596 Mon Sep 17 00:00:00 2001 From: Kunihiko Hayashi Date: Tue, 13 Dec 2022 17:24:49 +0900 Subject: [PATCH 17/66] dt-bindings: soc: socionext: Add UniPhier AHCI glue layer Add DT binding schema for components belonging to the platform-specific AHCI glue layer implemented in UniPhier SoCs. This AHCI glue layer works as a sideband logic for the host controller, including core reset, PHYs, and some signals to the controller. Signed-off-by: Kunihiko Hayashi Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221213082449.2721-18-hayashi.kunihiko@socionext.com Signed-off-by: Rob Herring --- .../socionext,uniphier-ahci-glue.yaml | 77 +++++++++++++++++++ 1 file changed, 77 insertions(+) create mode 100644 Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml new file mode 100644 index 000000000000..09f861cc068f --- /dev/null +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-ahci-glue.yaml @@ -0,0 +1,77 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/soc/socionext/socionext,uniphier-ahci-glue.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext UniPhier SoC AHCI glue layer + +maintainers: + - Kunihiko Hayashi + +description: |+ + AHCI glue layer implemented on Socionext UniPhier SoCs is a sideband + logic handling signals to AHCI host controller inside AHCI component. + +properties: + compatible: + items: + - enum: + - socionext,uniphier-pro4-ahci-glue + - socionext,uniphier-pxs2-ahci-glue + - socionext,uniphier-pxs3-ahci-glue + - const: simple-mfd + + reg: + maxItems: 1 + + "#address-cells": + const: 1 + + "#size-cells": + const: 1 + + ranges: true + +patternProperties: + "^reset-controller@[0-9a-f]+$": + $ref: /schemas/reset/socionext,uniphier-glue-reset.yaml# + + "phy@[0-9a-f]+$": + $ref: /schemas/phy/socionext,uniphier-ahci-phy.yaml# + +required: + - compatible + - reg + +additionalProperties: false + +examples: + - | + sata-controller@65700000 { + compatible = "socionext,uniphier-pxs3-ahci-glue", "simple-mfd"; + reg = <0x65b00000 0x400>; + #address-cells = <1>; + #size-cells = <1>; + ranges = <0 0x65700000 0x100>; + + reset-controller@0 { + compatible = "socionext,uniphier-pxs3-ahci-reset"; + reg = <0x0 0x4>; + clock-names = "link"; + clocks = <&sys_clk 28>; + reset-names = "link"; + resets = <&sys_rst 28>; + #reset-cells = <1>; + }; + + phy@10 { + compatible = "socionext,uniphier-pxs3-ahci-phy"; + reg = <0x10 0x10>; + clock-names = "link", "phy"; + clocks = <&sys_clk 28>, <&sys_clk 30>; + reset-names = "link", "phy"; + resets = <&sys_rst 28>, <&sys_rst 30>; + #phy-cells = <0>; + }; + }; From ec201955a53be4b57a467f7160724ff06289cead Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 19 Dec 2022 19:32:33 -0600 Subject: [PATCH 18/66] kbuild: Optionally enable schema checks for %.dtb targets While not documented, schema checks for single dtb targets mostly work already by setting 'CHECK_DTBS=1'. However, the dependencies are not handled and it only works if 'make dt_bindings_check' was run first and generated processed-schema.json. In addition, changing a binding file doesn't cause the schema to be rebuilt and dtb to be revalidated. Making this work turns out to be simple. Whenever CHECK_DTBS is set, make 'dt_binding_check' a 'dtbs_prepare' dependency. I reimplemented here what Masahiro had originally come up with a while back. Suggested-by: Masahiro Yamada Acked-by: Masahiro Yamada Reviewed-by: Dmitry Baryshkov Tested-by: Dmitry Baryshkov Tested-by: Marek Vasut Link: https://lore.kernel.org/r/20221220013233.2890335-1-robh@kernel.org Signed-off-by: Rob Herring --- Makefile | 9 ++++++++- 1 file changed, 8 insertions(+), 1 deletion(-) diff --git a/Makefile b/Makefile index d4b6af8c09e9..b74503aec68c 100644 --- a/Makefile +++ b/Makefile @@ -1481,7 +1481,10 @@ dtbs_prepare: include/config/kernel.release scripts_dtc ifneq ($(filter dtbs_check, $(MAKECMDGOALS)),) export CHECK_DTBS=y -dtbs: dt_binding_check +endif + +ifneq ($(CHECK_DTBS),) +dtbs_prepare: dt_binding_check endif dtbs_check: dtbs @@ -1779,6 +1782,10 @@ help: @echo ' 3: more obscure warnings, can most likely be ignored' @echo ' e: warnings are being treated as errors' @echo ' Multiple levels can be combined with W=12 or W=123' + @$(if $(dtstree), \ + echo ' make CHECK_DTBS=1 [targets] Check all generated dtb files against schema'; \ + echo ' This can be applied both to "dtbs" and to individual "foo.dtb" targets' ; \ + ) @echo '' @echo 'Execute "make" or "make all" to build all targets marked with [*] ' @echo 'For further info see the ./README file' From 8e5d0c68f23ab139e472f93ebbcfda9545e9953b Mon Sep 17 00:00:00 2001 From: Ricardo Ribalda Date: Tue, 20 Dec 2022 23:20:32 +0100 Subject: [PATCH 19/66] of: overlay: Fix trivial typo MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Permitted is spelled with two t. Signed-off-by: Ricardo Ribalda Reviewed-by: Philippe Mathieu-Daudé Link: https://lore.kernel.org/r/20221220-permited-v1-3-52ea9857fa61@chromium.org Signed-off-by: Rob Herring --- drivers/of/overlay.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/of/overlay.c b/drivers/of/overlay.c index ed4e6c144a68..2e01960f1aeb 100644 --- a/drivers/of/overlay.c +++ b/drivers/of/overlay.c @@ -1121,7 +1121,7 @@ static int node_overlaps_later_cs(struct overlay_changeset *remove_ovcs, * The topmost check is done by exploiting this property. For each * affected device node in the log list we check if this overlay is * the one closest to the tail. If another overlay has affected this - * device node and is closest to the tail, then removal is not permited. + * device node and is closest to the tail, then removal is not permitted. */ static int overlay_removal_is_ok(struct overlay_changeset *remove_ovcs) { From 00f2a08cd785d262c760282ec027caa6ea8975d4 Mon Sep 17 00:00:00 2001 From: Colin Foster Date: Thu, 22 Dec 2022 10:23:09 -0800 Subject: [PATCH 20/66] dt-bindings: memory-controllers: ti,gpmc: fix typo in description Fix typo where 'GPMC driver implements an interrupt controller' instead of 'and interrupt controller' Signed-off-by: Colin Foster Link: https://lore.kernel.org/r/20221222182309.575069-1-colin.foster@in-advantage.com Signed-off-by: Rob Herring --- .../devicetree/bindings/memory-controllers/ti,gpmc.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml index 4f30173ad747..bc9406929f6c 100644 --- a/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/ti,gpmc.yaml @@ -90,7 +90,7 @@ properties: interrupt-controller: description: | - The GPMC driver implements and interrupt controller for + The GPMC driver implements an interrupt controller for the NAND events "fifoevent" and "termcount" plus the rising/falling edges on the GPMC_WAIT pins. The interrupt number mapping is as follows From a98bf9df1c332a2c447083e1a2ca9578cd9f0721 Mon Sep 17 00:00:00 2001 From: Xu Panda Date: Fri, 23 Dec 2022 10:39:12 +0800 Subject: [PATCH 21/66] of: base: use strscpy() to instead of strncpy() The implementation of strscpy() is more robust and safer. That's now the recommended way to copy NUL terminated strings. Signed-off-by: Xu Panda Signed-off-by: Yang Yang Link: https://lore.kernel.org/r/202212231039128402297@zte.com.cn Signed-off-by: Rob Herring --- drivers/of/base.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/of/base.c b/drivers/of/base.c index d5a5c35eba72..ac6fde53342f 100644 --- a/drivers/of/base.c +++ b/drivers/of/base.c @@ -1884,8 +1884,7 @@ static void of_alias_add(struct alias_prop *ap, struct device_node *np, { ap->np = np; ap->id = id; - strncpy(ap->stem, stem, stem_len); - ap->stem[stem_len] = 0; + strscpy(ap->stem, stem, stem_len + 1); list_add_tail(&ap->link, &aliases_lookup); pr_debug("adding DT alias:%s: stem=%s id=%i node=%pOF\n", ap->alias, ap->stem, ap->id, np); From 5314187a603b4e1a1b26e4c2d1677914e22d9d22 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 9 Dec 2022 11:16:36 -0600 Subject: [PATCH 22/66] dt-bindings: interrupt-controller: Convert Synquacer EXIU to DT schema Convert the Socionext Synquacer EXIU interrupt controller to DT schema format. Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221209171636.3351602-1-robh@kernel.org Signed-off-by: Rob Herring --- .../socionext,synquacer-exiu.txt | 31 ----------- .../socionext,synquacer-exiu.yaml | 53 +++++++++++++++++++ 2 files changed, 53 insertions(+), 31 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt b/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt deleted file mode 100644 index dac0846fe789..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.txt +++ /dev/null @@ -1,31 +0,0 @@ -Socionext SynQuacer External Interrupt Unit (EXIU) - -The Socionext Synquacer SoC has an external interrupt unit (EXIU) -that forwards a block of 32 configurable input lines to 32 adjacent -level-high type GICv3 SPIs. - -Required properties: - -- compatible : Should be "socionext,synquacer-exiu". -- reg : Specifies base physical address and size of the - control registers. -- interrupt-controller : Identifies the node as an interrupt controller. -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value must be 3. -- socionext,spi-base : The SPI number of the first SPI of the 32 adjacent - ones the EXIU forwards its interrups to. - -Notes: - -- Only SPIs can use the EXIU as an interrupt parent. - -Example: - - exiu: interrupt-controller@510c0000 { - compatible = "socionext,synquacer-exiu"; - reg = <0x0 0x510c0000 0x0 0x20>; - interrupt-controller; - interrupt-parent = <&gic>; - #interrupt-cells = <3>; - socionext,spi-base = <112>; - }; diff --git a/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml b/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml new file mode 100644 index 000000000000..92cec2255cca --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/socionext,synquacer-exiu.yaml @@ -0,0 +1,53 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/socionext,synquacer-exiu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext SynQuacer External Interrupt Unit (EXIU) + +maintainers: + - Ard Biesheuvel + +description: |+ + The Socionext SynQuacer SoC has an external interrupt unit (EXIU) + that forwards a block of 32 configurable input lines to 32 adjacent + level-high type GICv3 SPIs. + +properties: + compatible: + const: socionext,synquacer-exiu + + reg: + maxItems: 1 + + '#interrupt-cells': + const: 3 + + interrupt-controller: true + + socionext,spi-base: + $ref: /schemas/types.yaml#/definitions/uint32 + description: The SPI number of the first SPI of the 32 adjacent ones the + EXIU forwards its interrupts to. + +required: + - compatible + - reg + - '#interrupt-cells' + - interrupt-controller + - socionext,spi-base + +unevaluatedProperties: false + +examples: + - | + interrupt-controller@510c0000 { + compatible = "socionext,synquacer-exiu"; + reg = <0x510c0000 0x20>; + interrupt-controller; + interrupt-parent = <&gic>; + #interrupt-cells = <3>; + socionext,spi-base = <112>; + }; +... From 3db50cb6db7771f4dfa14fb5ef76841627fd9e58 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 9 Dec 2022 11:16:57 -0600 Subject: [PATCH 23/66] dt-bindings: i2c: Convert Synquacer I2C to DT schema Convert the Socionext Synquacer I2C binding to DT schema format. Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221209171658.3352119-1-robh@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/i2c/i2c-synquacer.txt | 29 ---------- .../bindings/i2c/socionext,synquacer-i2c.yaml | 58 +++++++++++++++++++ MAINTAINERS | 2 +- 3 files changed, 59 insertions(+), 30 deletions(-) delete mode 100644 Documentation/devicetree/bindings/i2c/i2c-synquacer.txt create mode 100644 Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml diff --git a/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt b/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt deleted file mode 100644 index 72f4a2f0fedc..000000000000 --- a/Documentation/devicetree/bindings/i2c/i2c-synquacer.txt +++ /dev/null @@ -1,29 +0,0 @@ -Socionext SynQuacer I2C - -Required properties: -- compatible : Must be "socionext,synquacer-i2c" -- reg : Offset and length of the register set for the device -- interrupts : A single interrupt specifier -- #address-cells : Must be <1>; -- #size-cells : Must be <0>; -- clock-names : Must contain "pclk". -- clocks : Must contain an entry for each name in clock-names. - (See the common clock bindings.) - -Optional properties: -- clock-frequency : Desired I2C bus clock frequency in Hz. As only Normal and - Fast modes are supported, possible values are 100000 and - 400000. - -Example : - - i2c@51210000 { - compatible = "socionext,synquacer-i2c"; - reg = <0x51210000 0x1000>; - interrupts = ; - #address-cells = <1>; - #size-cells = <0>; - clock-names = "pclk"; - clocks = <&clk_i2c>; - clock-frequency = <400000>; - }; diff --git a/Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml b/Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml new file mode 100644 index 000000000000..f9d6e2038bb4 --- /dev/null +++ b/Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/i2c/socionext,synquacer-i2c.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Socionext SynQuacer I2C Controller + +maintainers: + - Ard Biesheuvel + +allOf: + - $ref: /schemas/i2c/i2c-controller.yaml# + +properties: + compatible: + const: socionext,synquacer-i2c + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + const: pclk + + clock-frequency: + minimum: 100000 + maximum: 400000 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupts + - clocks + - clock-names + +unevaluatedProperties: false + +examples: + - | + #include + + i2c@51210000 { + compatible = "socionext,synquacer-i2c"; + reg = <0x51210000 0x1000>; + interrupts = ; + #address-cells = <1>; + #size-cells = <0>; + clock-names = "pclk"; + clocks = <&clk_i2c>; + clock-frequency = <400000>; + }; +... diff --git a/MAINTAINERS b/MAINTAINERS index 5035336998a3..2db295cef26a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -19310,7 +19310,7 @@ SOCIONEXT SYNQUACER I2C DRIVER M: Ard Biesheuvel L: linux-i2c@vger.kernel.org S: Maintained -F: Documentation/devicetree/bindings/i2c/i2c-synquacer.txt +F: Documentation/devicetree/bindings/i2c/socionext,synquacer-i2c.yaml F: drivers/i2c/busses/i2c-synquacer.c SOCIONEXT UNIPHIER SOUND DRIVER From 8ffbaa98ccf82383c9092cf3afa4d8512e52e612 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Wed, 28 Dec 2022 13:43:31 +0100 Subject: [PATCH 24/66] dt-bindings: ufs: qcom,ufs: document required-opps UFS device node on SC8280XP uses required-opps: sc8280xp-crd.dtb: ufs@1d84000: Unevaluated properties are not allowed ('required-opps' was unexpected) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221228124331.258416-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/ufs/qcom,ufs.yaml | 3 +++ 1 file changed, 3 insertions(+) diff --git a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml index f2d6298d926c..54f5f8dc5c87 100644 --- a/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml +++ b/Documentation/devicetree/bindings/ufs/qcom,ufs.yaml @@ -71,6 +71,9 @@ properties: minItems: 1 maxItems: 2 + required-opps: + maxItems: 1 + resets: maxItems: 1 From 323b8d0ddb92b189ed7561e8095a9aa43968d519 Mon Sep 17 00:00:00 2001 From: Etienne Carriere Date: Mon, 5 Sep 2022 16:55:55 +0200 Subject: [PATCH 25/66] dt-binding: gpio: publish binding IDs under dual license MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Changes gpio.h DT binding header file to be published under GPLv2 or BSD-2-Clause license terms. This change allows this GPIO generic bindings header file to be used in software components as bootloaders and OSes that are not published under GPLv2 terms. All contributors to gpio.h file in copy. Cc: Stephen Warren Cc: Linus Walleij Cc: Laxman Dewangan Cc: Andrew Jeffery Cc: Thomas Petazzoni Cc: Nuno Sá Signed-off-by: Etienne Carriere Acked-by: Nuno Sá Acked-by: Andrew Jeffery Reviewed-by: Linus Walleij Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20220905145555.674800-1-etienne.carriere@linaro.org Signed-off-by: Rob Herring --- include/dt-bindings/gpio/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/include/dt-bindings/gpio/gpio.h b/include/dt-bindings/gpio/gpio.h index 5566e58196a2..b5d531237448 100644 --- a/include/dt-bindings/gpio/gpio.h +++ b/include/dt-bindings/gpio/gpio.h @@ -1,4 +1,4 @@ -/* SPDX-License-Identifier: GPL-2.0 */ +/* SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) */ /* * This header provides constants for most GPIO bindings. * From 37483c2623650aad72619718a641b260ecfddb8b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sat, 24 Dec 2022 16:41:52 +0100 Subject: [PATCH 26/66] dt-bindings: clock: qcom,videocc: correct clocks per variant Different SoCs come with a bit different clock inputs: sm8250-mtp.dtb: clock-controller@abf0000: clock-names:0: 'bi_tcxo' was expected sm8250-mtp.dtb: clock-controller@abf0000: clock-names: ['iface', 'bi_tcxo', 'bi_tcxo_ao'] is too long Signed-off-by: Krzysztof Kozlowski Reviewed-by: Stephen Boyd Link: https://lore.kernel.org/r/20221224154152.43272-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- .../bindings/clock/qcom,videocc.yaml | 59 +++++++++++++++++-- 1 file changed, 55 insertions(+), 4 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml index e221985e743f..2b07146161b4 100644 --- a/Documentation/devicetree/bindings/clock/qcom,videocc.yaml +++ b/Documentation/devicetree/bindings/clock/qcom,videocc.yaml @@ -30,12 +30,12 @@ properties: - qcom,sm8250-videocc clocks: - items: - - description: Board XO source + minItems: 1 + maxItems: 3 clock-names: - items: - - const: bi_tcxo + minItems: 1 + maxItems: 3 '#clock-cells': const: 1 @@ -68,6 +68,57 @@ required: - '#reset-cells' - '#power-domain-cells' +allOf: + - if: + properties: + compatible: + enum: + - qcom,sc7180-videocc + - qcom,sdm845-videocc + - qcom,sm8150-videocc + then: + properties: + clocks: + items: + - description: Board XO source + clock-names: + items: + - const: bi_tcxo + + - if: + properties: + compatible: + enum: + - qcom,sc7280-videocc + then: + properties: + clocks: + items: + - description: Board XO source + - description: Board active XO source + clock-names: + items: + - const: bi_tcxo + - const: bi_tcxo_ao + + - if: + properties: + compatible: + enum: + - qcom,sm8250-videocc + then: + properties: + clocks: + items: + - description: AHB + - description: Board XO source + - description: Board active XO source + clock-names: + items: + - const: iface + - const: bi_tcxo + - const: bi_tcxo_ao + additionalProperties: false examples: From fe7ce2983ba56ff482b5f275e72fb9af447fa2c8 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 13 Jan 2023 15:49:50 +0100 Subject: [PATCH 27/66] dt-bindindgs: i2c: qcom,i2c-geni: document operating-points-v2 Just like other Geni serial interfaces (qcom,geni-spi and qcom,geni-uart), the Geni I2C Controller comes with OPP table: sdm845-sony-xperia-tama-apollo.dtb: i2c@894000: Unevaluated properties are not allowed ('operating-points-v2' was unexpected) Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230113144950.78246-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml index f5f7dc8f325c..0e88c85985b5 100644 --- a/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml +++ b/Documentation/devicetree/bindings/i2c/qcom,i2c-geni-qcom.yaml @@ -46,6 +46,8 @@ properties: interrupts: maxItems: 1 + operating-points-v2: true + pinctrl-0: true pinctrl-1: true From 7e38085d9c59b6d07c1986ea43d046d457dcf646 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Fri, 13 Jan 2023 20:54:35 +0000 Subject: [PATCH 28/66] dt-bindings: riscv: add SBI PMU event mappings The SBI PMU extension requires a firmware to be aware of the event to counter/mhpmevent mappings supported by the hardware. OpenSBI may use DeviceTree to describe the PMU mappings. This binding is currently described in markdown in OpenSBI (since v1.0 in Dec 2021) & used by QEMU since v7.2.0. Import the binding for use while validating dtb dumps from QEMU and upcoming hardware (eg JH7110 SoC) that will make use of the event mapping. Link: https://github.com/riscv-software-src/opensbi/blob/master/docs/pmu_support.md Link: https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc # Performance Monitoring Unit Extension Co-developed-by: Atish Patra Signed-off-by: Atish Patra Reviewed-by: Andrew Jones Signed-off-by: Conor Dooley Link: https://lore.kernel.org/r/20230113205435.122712-1-conor@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/perf/riscv,pmu.yaml | 161 ++++++++++++++++++ 1 file changed, 161 insertions(+) create mode 100644 Documentation/devicetree/bindings/perf/riscv,pmu.yaml diff --git a/Documentation/devicetree/bindings/perf/riscv,pmu.yaml b/Documentation/devicetree/bindings/perf/riscv,pmu.yaml new file mode 100644 index 000000000000..a55a4d047d3f --- /dev/null +++ b/Documentation/devicetree/bindings/perf/riscv,pmu.yaml @@ -0,0 +1,161 @@ +# SPDX-License-Identifier: BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/perf/riscv,pmu.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: RISC-V SBI PMU events + +maintainers: + - Atish Patra + +description: | + The SBI PMU extension allows supervisor software to configure, start and + stop any performance counter at anytime. Thus, a user can leverage all + capabilities of performance analysis tools, such as perf, if the SBI PMU + extension is enabled. The following constraints apply: + + The platform must provide information about PMU event to counter mappings + either via device tree or another way, specific to the platform. + Without the event to counter mappings, the SBI PMU extension cannot be used. + + Platforms should provide information about the PMU event selector values + that should be encoded in the expected value of MHPMEVENTx while configuring + MHPMCOUNTERx for that specific event. The can either be done via device tree + or another way, specific to the platform. + The exact value to be written to MHPMEVENTx is completely dependent on the + platform. + + For information on the SBI specification see the section "Performance + Monitoring Unit Extension" of: + https://github.com/riscv-non-isa/riscv-sbi-doc/blob/master/riscv-sbi.adoc + +properties: + compatible: + const: riscv,pmu + + riscv,event-to-mhpmevent: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: + Represents an ONE-to-ONE mapping between a PMU event and the event + selector value that the platform expects to be written to the MHPMEVENTx + CSR for that event. + The mapping is encoded in an matrix format where each element represents + an event. + This property shouldn't encode any raw hardware event. + items: + items: + - description: event_idx, a 20-bit wide encoding of the event type and + code. Refer to the SBI specification for a complete description of + the event types and codes. + - description: upper 32 bits of the event selector value for MHPMEVENTx + - description: lower 32 bits of the event selector value for MHPMEVENTx + + riscv,event-to-mhpmcounters: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: + Represents a MANY-to-MANY mapping between a range of events and all the + MHPMCOUNTERx in a bitmap format that can be used to monitor these range + of events. The information is encoded in an matrix format where each + element represents a certain range of events and corresponding counters. + This property shouldn't encode any raw event. + items: + items: + - description: first event_idx of the range of events + - description: last event_idx of the range of events + - description: bitmap of MHPMCOUNTERx for this event + + riscv,raw-event-to-mhpmcounters: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: + Represents an ONE-to-MANY or MANY-to-MANY mapping between the rawevent(s) + and all the MHPMCOUNTERx in a bitmap format that can be used to monitor + that raw event. + The encoding of the raw events are platform specific. The information is + encoded in a matrix format where each element represents the specific raw + event(s). + If a platform directly encodes each raw PMU event as a unique ID, the + value of variant must be 0xffffffff_ffffffff. + items: + items: + - description: + upper 32 invariant bits for the range of events + - description: + lower 32 invariant bits for the range of events + - description: + upper 32 bits of the variant bit mask for the range of events + - description: + lower 32 bits of the variant bit mask for the range of events + - description: + bitmap of all MHPMCOUNTERx that can monitor the range of events + +dependencies: + "riscv,event-to-mhpmevent": [ "riscv,event-to-mhpmcounters" ] + "riscv,event-to-mhpmcounters": [ "riscv,event-to-mhpmevent" ] + +required: + - compatible + +additionalProperties: false + +examples: + - | + pmu { + compatible = "riscv,pmu"; + riscv,event-to-mhpmevent = <0x0000B 0x0000 0x0001>; + riscv,event-to-mhpmcounters = <0x00001 0x00001 0x00000001>, + <0x00002 0x00002 0x00000004>, + <0x00003 0x0000A 0x00000ff8>, + <0x10000 0x10033 0x000ff000>; + riscv,raw-event-to-mhpmcounters = + /* For event ID 0x0002 */ + <0x0000 0x0002 0xffffffff 0xffffffff 0x00000f8>, + /* For event ID 0-4 */ + <0x0 0x0 0xffffffff 0xfffffff0 0x00000ff0>, + /* For event ID 0xffffffff0000000f - 0xffffffff000000ff */ + <0xffffffff 0x0 0xffffffff 0xffffff0f 0x00000ff0>; + }; + + - | + /* + * For HiFive Unmatched board the encodings can be found here + * https://sifive.cdn.prismic.io/sifive/1a82e600-1f93-4f41-b2d8-86ed8b16acba_fu740-c000-manual-v1p6.pdf + * + * This example also binds standard SBI PMU hardware IDs to U74 PMU event + * codes, U74 uses a bitfield for events encoding, so several U74 events + * can be bound to a single perf ID. + * See SBI PMU hardware IDs in arch/riscv/include/asm/sbi.h + */ + pmu { + compatible = "riscv,pmu"; + riscv,event-to-mhpmevent = + /* SBI_PMU_HW_CACHE_REFERENCES -> Instruction or Data cache/ITIM busy */ + <0x00003 0x00000000 0x1801>, + /* SBI_PMU_HW_CACHE_MISSES -> Instruction or Data cache miss or MMIO access */ + <0x00004 0x00000000 0x0302>, + /* SBI_PMU_HW_BRANCH_INSTRUCTIONS -> Conditional branch retired */ + <0x00005 0x00000000 0x4000>, + /* SBI_PMU_HW_BRANCH_MISSES -> Branch or jump misprediction */ + <0x00006 0x00000000 0x6001>, + /* L1D_READ_MISS -> Data cache miss or MMIO access */ + <0x10001 0x00000000 0x0202>, + /* L1D_WRITE_ACCESS -> Data cache write-back */ + <0x10002 0x00000000 0x0402>, + /* L1I_READ_ACCESS -> Instruction cache miss */ + <0x10009 0x00000000 0x0102>, + /* LL_READ_MISS -> UTLB miss */ + <0x10011 0x00000000 0x2002>, + /* DTLB_READ_MISS -> Data TLB miss */ + <0x10019 0x00000000 0x1002>, + /* ITLB_READ_MISS-> Instruction TLB miss */ + <0x10021 0x00000000 0x0802>; + riscv,event-to-mhpmcounters = <0x00003 0x00006 0x18>, + <0x10001 0x10002 0x18>, + <0x10009 0x10009 0x18>, + <0x10011 0x10011 0x18>, + <0x10019 0x10019 0x18>, + <0x10021 0x10021 0x18>; + riscv,raw-event-to-mhpmcounters = <0x0 0x0 0xffffffff 0xfc0000ff 0x18>, + <0x0 0x1 0xffffffff 0xfff800ff 0x18>, + <0x0 0x2 0xffffffff 0xffffe0ff 0x18>; + }; From eb2b4ecf7299ee39ee9cecc4d3f2633aeb10cefb Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Cl=C3=A9ment=20L=C3=A9ger?= Date: Tue, 17 Jan 2023 15:49:29 +0100 Subject: [PATCH 29/66] of/irq: add missing of_node_put() for interrupt parent node MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit After calling of_irq_parse_one(), the node provided in the of_phandle_args has a refcount increment by one. Add missing of_node_put in of_irq_get() to decrement the refcount once used. Signed-off-by: Clément Léger Link: https://lore.kernel.org/r/20230117144929.423089-1-clement.leger@bootlin.com Signed-off-by: Rob Herring --- drivers/of/irq.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/of/irq.c b/drivers/of/irq.c index e9bf5236ed89..174900072c18 100644 --- a/drivers/of/irq.c +++ b/drivers/of/irq.c @@ -438,10 +438,16 @@ int of_irq_get(struct device_node *dev, int index) return rc; domain = irq_find_host(oirq.np); - if (!domain) - return -EPROBE_DEFER; + if (!domain) { + rc = -EPROBE_DEFER; + goto out; + } - return irq_create_of_mapping(&oirq); + rc = irq_create_of_mapping(&oirq); +out: + of_node_put(oirq.np); + + return rc; } EXPORT_SYMBOL_GPL(of_irq_get); From aa222f9311e120f40737ca3eb60771d40df017a1 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Mon, 19 Dec 2022 13:12:08 -0600 Subject: [PATCH 30/66] dt-bindings: PCI: Convert Rockchip RK3399 PCIe to DT schema Convert the Rockchip RK3399 PCIe Host/Endpoint controller to DT schema format. Like most dual mode PCI controllers, we need to split the schema into common, host and endpoint schemas. Link: https://lore.kernel.org/r/20221219191209.1975834-1-robh@kernel.org Signed-off-by: Rob Herring --- .../pci/rockchip,rk3399-pcie-common.yaml | 69 +++++++++ .../bindings/pci/rockchip,rk3399-pcie-ep.yaml | 68 +++++++++ .../bindings/pci/rockchip,rk3399-pcie.yaml | 132 +++++++++++++++++ .../bindings/pci/rockchip-pcie-ep.txt | 62 -------- .../bindings/pci/rockchip-pcie-host.txt | 135 ------------------ MAINTAINERS | 2 +- 6 files changed, 270 insertions(+), 198 deletions(-) create mode 100644 Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml create mode 100644 Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml create mode 100644 Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml delete mode 100644 Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt delete mode 100644 Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml new file mode 100644 index 000000000000..a8574f8a84a3 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-common.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-common.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip AXI PCIe Bridge Common Properties + +maintainers: + - Shawn Lin + +properties: + reg: + maxItems: 2 + + clocks: + maxItems: 4 + + clock-names: + items: + - const: aclk + - const: aclk-perf + - const: hclk + - const: pm + + num-lanes: + maximum: 4 + + phys: + oneOf: + - maxItems: 1 + - maxItems: 4 + + phy-names: + oneOf: + - const: pcie-phy + - items: + - const: pcie-phy-0 + - const: pcie-phy-1 + - const: pcie-phy-2 + - const: pcie-phy-3 + + resets: + maxItems: 7 + + reset-names: + items: + - const: core + - const: mgmt + - const: mgmt-sticky + - const: pipe + - const: pm + - const: pclk + - const: aclk + +required: + - compatible + - reg + - reg-names + - clocks + - clock-names + - phys + - phy-names + - resets + - reset-names + +additionalProperties: true + +... diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml new file mode 100644 index 000000000000..88386a6d7011 --- /dev/null +++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie-ep.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie-ep.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip AXI PCIe Endpoint + +maintainers: + - Shawn Lin + +allOf: + - $ref: /schemas/pci/pci-ep.yaml# + - $ref: rockchip,rk3399-pcie-common.yaml# + +properties: + compatible: + const: rockchip,rk3399-pcie-ep + + reg: true + + reg-names: + items: + - const: apb-base + - const: mem-base + + rockchip,max-outbound-regions: + description: Maximum number of outbound regions + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 32 + default: 32 + +required: + - rockchip,max-outbound-regions + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie-ep@f8000000 { + compatible = "rockchip,rk3399-pcie-ep"; + reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0x80000000 0x0 0x20000>; + reg-names = "apb-base", "mem-base"; + clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>, + <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; + clock-names = "aclk", "aclk-perf", + "hclk", "pm"; + max-functions = /bits/ 8 <8>; + num-lanes = <4>; + resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, + <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> , + <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>; + reset-names = "core", "mgmt", "mgmt-sticky", "pipe", + "pm", "pclk", "aclk"; + phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>; + phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3"; + rockchip,max-outbound-regions = <16>; + }; + }; +... diff --git a/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml new file mode 100644 index 000000000000..531008f0b6ac --- /dev/null +++ b/Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie.yaml @@ -0,0 +1,132 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/pci/rockchip,rk3399-pcie.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Rockchip AXI PCIe Root Port Bridge Host + +maintainers: + - Shawn Lin + +allOf: + - $ref: /schemas/pci/pci-bus.yaml# + - $ref: rockchip,rk3399-pcie-common.yaml# + +properties: + compatible: + const: rockchip,rk3399-pcie + + reg: true + + reg-names: + items: + - const: axi-base + - const: apb-base + + interrupts: + maxItems: 3 + + interrupt-names: + items: + - const: sys + - const: legacy + - const: client + + aspm-no-l0s: + description: This property is needed if using 24MHz OSC for RC's PHY. + + ep-gpios: + description: pre-reset GPIO + + vpcie12v-supply: + description: The 12v regulator to use for PCIe. + + vpcie3v3-supply: + description: The 3.3v regulator to use for PCIe. + + vpcie1v8-supply: + description: The 1.8v regulator to use for PCIe. + + vpcie0v9-supply: + description: The 0.9v regulator to use for PCIe. + + interrupt-controller: + type: object + additionalProperties: false + + properties: + '#address-cells': + const: 0 + + '#interrupt-cells': + const: 1 + + interrupt-controller: true + +required: + - ranges + - "#interrupt-cells" + - interrupts + - interrupt-controller + - interrupt-map + - interrupt-map-mask + - msi-map + +unevaluatedProperties: false + +examples: + - | + #include + #include + #include + + bus { + #address-cells = <2>; + #size-cells = <2>; + + pcie@f8000000 { + compatible = "rockchip,rk3399-pcie"; + device_type = "pci"; + #address-cells = <3>; + #size-cells = <2>; + clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>, + <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; + clock-names = "aclk", "aclk-perf", + "hclk", "pm"; + interrupts = , + , + ; + interrupt-names = "sys", "legacy", "client"; + ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; + ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000 + 0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>; + num-lanes = <4>; + msi-map = <0x0 &its 0x0 0x1000>; + reg = <0x0 0xf8000000 0x0 0x2000000>, <0x0 0xfd000000 0x0 0x1000000>; + reg-names = "axi-base", "apb-base"; + resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, + <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> , + <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>; + reset-names = "core", "mgmt", "mgmt-sticky", "pipe", + "pm", "pclk", "aclk"; + /* deprecated legacy PHY model */ + phys = <&pcie_phy>; + phy-names = "pcie-phy"; + pinctrl-names = "default"; + pinctrl-0 = <&pcie_clkreq>; + #interrupt-cells = <1>; + interrupt-map-mask = <0 0 0 7>; + interrupt-map = <0 0 0 1 &pcie0_intc 0>, + <0 0 0 2 &pcie0_intc 1>, + <0 0 0 3 &pcie0_intc 2>, + <0 0 0 4 &pcie0_intc 3>; + + pcie0_intc: interrupt-controller { + interrupt-controller; + #address-cells = <0>; + #interrupt-cells = <1>; + }; + }; + }; +... diff --git a/Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt b/Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt deleted file mode 100644 index 778467307a93..000000000000 --- a/Documentation/devicetree/bindings/pci/rockchip-pcie-ep.txt +++ /dev/null @@ -1,62 +0,0 @@ -* Rockchip AXI PCIe Endpoint Controller DT description - -Required properties: -- compatible: Should contain "rockchip,rk3399-pcie-ep" -- reg: Two register ranges as listed in the reg-names property -- reg-names: Must include the following names - - "apb-base" - - "mem-base" -- clocks: Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: Must include the following entries: - - "aclk" - - "aclk-perf" - - "hclk" - - "pm" -- resets: Must contain seven entries for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names: Must include the following names - - "core" - - "mgmt" - - "mgmt-sticky" - - "pipe" - - "pm" - - "aclk" - - "pclk" -- pinctrl-names : The pin control state names -- pinctrl-0: The "default" pinctrl state -- phys: Must contain an phandle to a PHY for each entry in phy-names. -- phy-names: Must include 4 entries for all 4 lanes even if some of - them won't be used for your cases. Entries are of the form "pcie-phy-N": - where N ranges from 0 to 3. - (see example below and you MUST also refer to ../phy/rockchip-pcie-phy.txt - for changing the #phy-cells of phy node to support it) -- rockchip,max-outbound-regions: Maximum number of outbound regions - -Optional Property: -- num-lanes: number of lanes to use -- max-functions: Maximum number of functions that can be configured (default 1). - -pcie0-ep: pcie@f8000000 { - compatible = "rockchip,rk3399-pcie-ep"; - #address-cells = <3>; - #size-cells = <2>; - rockchip,max-outbound-regions = <16>; - clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>, - <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; - clock-names = "aclk", "aclk-perf", - "hclk", "pm"; - max-functions = /bits/ 8 <8>; - num-lanes = <4>; - reg = <0x0 0xfd000000 0x0 0x1000000>, <0x0 0x80000000 0x0 0x20000>; - reg-names = "apb-base", "mem-base"; - resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, - <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> , - <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>; - reset-names = "core", "mgmt", "mgmt-sticky", "pipe", - "pm", "pclk", "aclk"; - phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>; - phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3"; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreq>; -}; diff --git a/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt b/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt deleted file mode 100644 index af34c65773fd..000000000000 --- a/Documentation/devicetree/bindings/pci/rockchip-pcie-host.txt +++ /dev/null @@ -1,135 +0,0 @@ -* Rockchip AXI PCIe Root Port Bridge DT description - -Required properties: -- #address-cells: Address representation for root ports, set to <3> -- #size-cells: Size representation for root ports, set to <2> -- #interrupt-cells: specifies the number of cells needed to encode an - interrupt source. The value must be 1. -- compatible: Should contain "rockchip,rk3399-pcie" -- reg: Two register ranges as listed in the reg-names property -- reg-names: Must include the following names - - "axi-base" - - "apb-base" -- clocks: Must contain an entry for each entry in clock-names. - See ../clocks/clock-bindings.txt for details. -- clock-names: Must include the following entries: - - "aclk" - - "aclk-perf" - - "hclk" - - "pm" -- msi-map: Maps a Requester ID to an MSI controller and associated - msi-specifier data. See ./pci-msi.txt -- interrupts: Three interrupt entries must be specified. -- interrupt-names: Must include the following names - - "sys" - - "legacy" - - "client" -- resets: Must contain seven entries for each entry in reset-names. - See ../reset/reset.txt for details. -- reset-names: Must include the following names - - "core" - - "mgmt" - - "mgmt-sticky" - - "pipe" - - "pm" - - "aclk" - - "pclk" -- pinctrl-names : The pin control state names -- pinctrl-0: The "default" pinctrl state -- #interrupt-cells: specifies the number of cells needed to encode an - interrupt source. The value must be 1. -- interrupt-map-mask and interrupt-map: standard PCI properties - -Required properties for legacy PHY model (deprecated): -- phys: From PHY bindings: Phandle for the Generic PHY for PCIe. -- phy-names: MUST be "pcie-phy". - -Required properties for per-lane PHY model (preferred): -- phys: Must contain an phandle to a PHY for each entry in phy-names. -- phy-names: Must include 4 entries for all 4 lanes even if some of - them won't be used for your cases. Entries are of the form "pcie-phy-N": - where N ranges from 0 to 3. - (see example below and you MUST also refer to ../phy/rockchip-pcie-phy.txt - for changing the #phy-cells of phy node to support it) - -Optional Property: -- aspm-no-l0s: RC won't support ASPM L0s. This property is needed if - using 24MHz OSC for RC's PHY. -- ep-gpios: contain the entry for pre-reset GPIO -- num-lanes: number of lanes to use -- vpcie12v-supply: The phandle to the 12v regulator to use for PCIe. -- vpcie3v3-supply: The phandle to the 3.3v regulator to use for PCIe. -- vpcie1v8-supply: The phandle to the 1.8v regulator to use for PCIe. -- vpcie0v9-supply: The phandle to the 0.9v regulator to use for PCIe. - -*Interrupt controller child node* -The core controller provides a single interrupt for legacy INTx. The PCIe node -should contain an interrupt controller node as a target for the PCI -'interrupt-map' property. This node represents the domain at which the four -INTx interrupts are decoded and routed. - - -Required properties for Interrupt controller child node: -- interrupt-controller: identifies the node as an interrupt controller -- #address-cells: specifies the number of cells needed to encode an - address. The value must be 0. -- #interrupt-cells: specifies the number of cells needed to encode an - interrupt source. The value must be 1. - -Example: - -pcie0: pcie@f8000000 { - compatible = "rockchip,rk3399-pcie"; - #address-cells = <3>; - #size-cells = <2>; - clocks = <&cru ACLK_PCIE>, <&cru ACLK_PERF_PCIE>, - <&cru PCLK_PCIE>, <&cru SCLK_PCIE_PM>; - clock-names = "aclk", "aclk-perf", - "hclk", "pm"; - bus-range = <0x0 0x1>; - interrupts = , - , - ; - interrupt-names = "sys", "legacy", "client"; - assigned-clocks = <&cru SCLK_PCIEPHY_REF>; - assigned-clock-parents = <&cru SCLK_PCIEPHY_REF100M>; - assigned-clock-rates = <100000000>; - ep-gpios = <&gpio3 13 GPIO_ACTIVE_HIGH>; - ranges = <0x83000000 0x0 0xfa000000 0x0 0xfa000000 0x0 0x600000 - 0x81000000 0x0 0xfa600000 0x0 0xfa600000 0x0 0x100000>; - num-lanes = <4>; - msi-map = <0x0 &its 0x0 0x1000>; - reg = <0x0 0xf8000000 0x0 0x2000000>, <0x0 0xfd000000 0x0 0x1000000>; - reg-names = "axi-base", "apb-base"; - resets = <&cru SRST_PCIE_CORE>, <&cru SRST_PCIE_MGMT>, - <&cru SRST_PCIE_MGMT_STICKY>, <&cru SRST_PCIE_PIPE> , - <&cru SRST_PCIE_PM>, <&cru SRST_P_PCIE>, <&cru SRST_A_PCIE>; - reset-names = "core", "mgmt", "mgmt-sticky", "pipe", - "pm", "pclk", "aclk"; - /* deprecated legacy PHY model */ - phys = <&pcie_phy>; - phy-names = "pcie-phy"; - pinctrl-names = "default"; - pinctrl-0 = <&pcie_clkreq>; - #interrupt-cells = <1>; - interrupt-map-mask = <0 0 0 7>; - interrupt-map = <0 0 0 1 &pcie0_intc 0>, - <0 0 0 2 &pcie0_intc 1>, - <0 0 0 3 &pcie0_intc 2>, - <0 0 0 4 &pcie0_intc 3>; - pcie0_intc: interrupt-controller { - interrupt-controller; - #address-cells = <0>; - #interrupt-cells = <1>; - }; -}; - -pcie0: pcie@f8000000 { - ... - - /* preferred per-lane PHY model */ - phys = <&pcie_phy 0>, <&pcie_phy 1>, <&pcie_phy 2>, <&pcie_phy 3>; - phy-names = "pcie-phy-0", "pcie-phy-1", "pcie-phy-2", "pcie-phy-3"; - - ... -}; diff --git a/MAINTAINERS b/MAINTAINERS index 2db295cef26a..04d8cc852e77 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -16307,7 +16307,7 @@ M: Shawn Lin L: linux-pci@vger.kernel.org L: linux-rockchip@lists.infradead.org S: Maintained -F: Documentation/devicetree/bindings/pci/rockchip-pcie* +F: Documentation/devicetree/bindings/pci/rockchip,rk3399-pcie* F: drivers/pci/controller/pcie-rockchip* PCIE DRIVER FOR SOCIONEXT UNIPHIER From 805e640e09b08f398a218f772f9bd7fe2ad1f647 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 19 Jan 2023 20:03:39 -0600 Subject: [PATCH 31/66] dt-bindings: soc: socionext,uniphier-soc-glue: Make child node names fixed names The child nodes 'pinctrl', 'usb-hub', and 'clock-controller' in the socionext,uniphier-soc-glue binding are not patterns, but the full node name, so move them to 'properties'. As patterns, they were missing start and end anchors so any prefix or suffix was allowed. Fixes: 0611adff8b3a ("dt-bindings: soc: socionext: Add UniPhier SoC-glue logic") Reviewed-by: Kunihiko Hayashi Link: https://lore.kernel.org/r/20230120020339.3223112-1-robh@kernel.org Signed-off-by: Rob Herring --- .../bindings/soc/socionext/socionext,uniphier-soc-glue.yaml | 1 - 1 file changed, 1 deletion(-) diff --git a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml index 4b6852db4747..7845dcfca986 100644 --- a/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml +++ b/Documentation/devicetree/bindings/soc/socionext/socionext,uniphier-soc-glue.yaml @@ -32,7 +32,6 @@ properties: reg: maxItems: 1 -patternProperties: pinctrl: $ref: /schemas/pinctrl/socionext,uniphier-pinctrl.yaml# From 21fd06dc4a3440c8b7e7029b64952677843346b2 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Thu, 19 Jan 2023 14:10:33 +0100 Subject: [PATCH 32/66] dt-bindings: drop type for operating-points-v2 The type for operating-points-v2 property is coming from dtschema (/schemas/opp/opp.yaml), so individual bindings can just use simple "true". Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230119131033.117324-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- .../devicetree/bindings/display/msm/dp-controller.yaml | 3 +-- .../devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml | 3 +-- .../devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml | 3 +-- .../devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml | 3 +-- .../devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml | 3 +-- .../devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml | 3 +-- .../devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml | 3 +-- .../bindings/display/tegra/nvidia,tegra20-host1x.yaml | 3 +-- .../devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml | 3 +-- .../devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml | 3 +-- .../devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml | 3 +-- .../devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml | 3 +-- .../devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml | 3 +-- Documentation/devicetree/bindings/power/power-domain.yaml | 3 --- Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml | 3 +-- 15 files changed, 14 insertions(+), 31 deletions(-) diff --git a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml index f2515af8256f..9db39fb1cfd7 100644 --- a/Documentation/devicetree/bindings/display/msm/dp-controller.yaml +++ b/Documentation/devicetree/bindings/display/msm/dp-controller.yaml @@ -68,8 +68,7 @@ properties: items: - const: dp - operating-points-v2: - maxItems: 1 + operating-points-v2: true opp-table: true diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml index 6eedee503aa0..69be95afd562 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dc.yaml @@ -59,8 +59,7 @@ properties: iommus: maxItems: 1 - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml index 75546f250ad7..511cbe74e729 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-dsi.yaml @@ -47,8 +47,7 @@ properties: items: - const: dsi - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: maxItems: 1 diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml index 0d55e6206b5e..3c095a5491fe 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-epp.yaml @@ -46,8 +46,7 @@ properties: interconnect-names: maxItems: 4 - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml index bf38accd98eb..1026b0bc3dc8 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr2d.yaml @@ -49,8 +49,7 @@ properties: interconnect-names: maxItems: 4 - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml index 4755a73473c7..59a52e732ca3 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-gr3d.yaml @@ -51,8 +51,7 @@ properties: minItems: 4 maxItems: 10 - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: minItems: 1 diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml index 035b9f1f2eb5..f65e59cfffa7 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-hdmi.yaml @@ -50,8 +50,7 @@ properties: items: - const: hdmi - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml index 913ca104c871..94c5242c03b2 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-host1x.yaml @@ -90,8 +90,7 @@ properties: items: - const: dma-mem # read - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml index 5f4f0fb4b692..2cd3e60cd0a8 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-mpe.yaml @@ -47,8 +47,7 @@ properties: interconnect-names: maxItems: 6 - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml index 467b015e5700..6c84d8b7eb7b 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-tvo.yaml @@ -30,8 +30,7 @@ properties: items: - description: module clock - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml index 782a4b10150a..a42bf33d1e7d 100644 --- a/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml +++ b/Documentation/devicetree/bindings/display/tegra/nvidia,tegra20-vi.yaml @@ -55,8 +55,7 @@ properties: minItems: 4 maxItems: 5 - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml index 481901269872..02f0b0462377 100644 --- a/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml +++ b/Documentation/devicetree/bindings/fuse/nvidia,tegra20-fuse.yaml @@ -44,8 +44,7 @@ properties: items: - const: fuse - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml index fe0270207622..fda0b45ee577 100644 --- a/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml +++ b/Documentation/devicetree/bindings/mmc/nvidia,tegra20-sdhci.yaml @@ -82,8 +82,7 @@ properties: iommus: maxItems: 1 - operating-points-v2: - $ref: "/schemas/types.yaml#/definitions/phandle" + operating-points-v2: true power-domains: items: diff --git a/Documentation/devicetree/bindings/power/power-domain.yaml b/Documentation/devicetree/bindings/power/power-domain.yaml index 889091b9814f..d1235e562041 100644 --- a/Documentation/devicetree/bindings/power/power-domain.yaml +++ b/Documentation/devicetree/bindings/power/power-domain.yaml @@ -43,9 +43,6 @@ properties: domain would be considered as capable of being powered-on or powered-off. operating-points-v2: - $ref: /schemas/types.yaml#/definitions/phandle-array - items: - maxItems: 1 description: Phandles to the OPP tables of power domains provided by a power domain provider. If the provider provides a single power domain only or all diff --git a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml index 739d3155dd32..41cea4979132 100644 --- a/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml +++ b/Documentation/devicetree/bindings/pwm/nvidia,tegra20-pwm.yaml @@ -63,8 +63,7 @@ properties: pinctrl-1: description: configuration for the sleep state - operating-points-v2: - $ref: /schemas/types.yaml#/definitions/phandle + operating-points-v2: true power-domains: items: From 8da765cca292a812988077ca8fbef8be151c2d0b Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Fri, 20 Jan 2023 08:56:17 +0100 Subject: [PATCH 33/66] dt-bindings: vendor-prefixes: document lineartechnology Document lineartechnology vendor prefix, already used in SPI dev. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230120075618.153664-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/vendor-prefixes.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/vendor-prefixes.yaml b/Documentation/devicetree/bindings/vendor-prefixes.yaml index 70ffb3780621..0e57ae744199 100644 --- a/Documentation/devicetree/bindings/vendor-prefixes.yaml +++ b/Documentation/devicetree/bindings/vendor-prefixes.yaml @@ -729,6 +729,8 @@ patternProperties: description: Lichee Pi "^linaro,.*": description: Linaro Limited + "^lineartechnology,.*": + description: Linear Technology "^linksprite,.*": description: LinkSprite Technologies, Inc. "^linksys,.*": From dbc2af0ace20a0b60f97ed763edd8cfc2c71aab3 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 25 Jan 2023 16:13:56 -0600 Subject: [PATCH 34/66] dt-bindings: display: msm: Drop type from 'memory-region' 'memory-region' is a common property and already has a type. Link: https://lore.kernel.org/r/20230125221357.3057655-1-robh@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/display/msm/gpu.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/display/msm/gpu.yaml b/Documentation/devicetree/bindings/display/msm/gpu.yaml index c5f49842dc7b..304525f81563 100644 --- a/Documentation/devicetree/bindings/display/msm/gpu.yaml +++ b/Documentation/devicetree/bindings/display/msm/gpu.yaml @@ -89,7 +89,7 @@ properties: help bring the GPU out of secure mode. properties: memory-region: - $ref: /schemas/types.yaml#/definitions/phandle + maxItems: 1 firmware-name: description: | From 0be465c61d4623e49672a2e7942d9d101184b8f8 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 25 Jan 2023 16:14:23 -0600 Subject: [PATCH 35/66] dt-bindings: interrupt-controller: brcm,bcm7120-l2-intc: Fix 'brcm,int-fwd-mask' differing type 'brcm,int-fwd-mask' is also defined in brcm,bcm7038-l1-intc.yaml as a 'uint32-array', so unify the type definition. Acked-by: Florian Fainelli Link: https://lore.kernel.org/r/20230125221423.3058221-1-robh@kernel.org Signed-off-by: Rob Herring --- .../bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml index 46b2eb3c43ee..c680de1cbd56 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/brcm,bcm7120-l2-intc.yaml @@ -109,7 +109,8 @@ properties: for system suspend/resume. brcm,int-fwd-mask: - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32-array + maxItems: 1 description: > if present, a bit mask to configure the interrupts which have a mux gate, typically UARTs. Setting these bits will make their respective interrupt From 92ec34fecc5d0f652f5adeb0c19e051981c15b42 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 25 Jan 2023 16:14:32 -0600 Subject: [PATCH 36/66] dt-bindings: PCI: ti,j721e-pci-host: Simplify 'device-id' schema 'device-id' is just a scalar value, so just 'enum' is sufficient. Link: https://lore.kernel.org/r/20230125221432.3058405-1-robh@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/pci/ti,j721e-pci-host.yaml | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml index b0513b197d08..3d7aee97353a 100644 --- a/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml +++ b/Documentation/devicetree/bindings/pci/ti,j721e-pci-host.yaml @@ -66,15 +66,11 @@ properties: const: 0x104c device-id: - oneOf: - - items: - - const: 0xb00d - - items: - - const: 0xb00f - - items: - - const: 0xb010 - - items: - - const: 0xb013 + enum: + - 0xb00d + - 0xb00f + - 0xb010 + - 0xb013 msi-map: true From 18b616d0c0ff51136b775429dfb2b9432459fe47 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 25 Jan 2023 16:14:50 -0600 Subject: [PATCH 37/66] dt-bindings: reserved-memory: Refine 'size' and 'alignment' types Both 'size' and 'alignment' are single values, but can be 32 or 64 bits. Use the precise types rather than the 2 32-bit cell encoding. Link: https://lore.kernel.org/r/20230125221450.3058762-1-robh@kernel.org Signed-off-by: Rob Herring --- .../bindings/reserved-memory/reserved-memory.yaml | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml index 44f72bcf1782..b205215b130d 100644 --- a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml +++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.yaml @@ -31,17 +31,17 @@ properties: reg: true size: - $ref: /schemas/types.yaml#/definitions/uint32-array - minItems: 1 - maxItems: 2 + oneOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - $ref: /schemas/types.yaml#/definitions/uint64 description: > Length based on parent's \#size-cells. Size in bytes of memory to reserve. alignment: - $ref: /schemas/types.yaml#/definitions/uint32-array - minItems: 1 - maxItems: 2 + oneOf: + - $ref: /schemas/types.yaml#/definitions/uint32 + - $ref: /schemas/types.yaml#/definitions/uint64 description: > Length based on parent's \#size-cells. Address boundary for alignment of allocation. From 56f9168f5ec66728fef2e082f637c1888f9a4a23 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 25 Jan 2023 16:13:39 -0600 Subject: [PATCH 38/66] dt-bindings: ti,k3: Use common ti,k3-sci-common.yaml schema Instead of redefining the 'ti,sci' and 'ti,sci-dev-id' properties multiple times, reference the common schema where they are defined. Most cases using these properties already do this, just udma and ringacc need to be fixed. Acked-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20230125221339.3057322-1-robh@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/dma/ti/k3-udma.yaml | 9 +-------- .../devicetree/bindings/soc/ti/k3-ringacc.yaml | 13 ++++--------- 2 files changed, 5 insertions(+), 17 deletions(-) diff --git a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml index 7ff428ad3aae..97f6ae9b1236 100644 --- a/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml +++ b/Documentation/devicetree/bindings/dma/ti/k3-udma.yaml @@ -44,6 +44,7 @@ description: | allOf: - $ref: "../dma-controller.yaml#" + - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# properties: "#dma-cells": @@ -78,14 +79,6 @@ properties: msi-parent: true - ti,sci: - description: phandle to TI-SCI compatible System controller node - $ref: /schemas/types.yaml#/definitions/phandle - - ti,sci-dev-id: - description: TI-SCI device id of UDMAP - $ref: /schemas/types.yaml#/definitions/uint32 - ti,ringacc: description: phandle to the ring accelerator node $ref: /schemas/types.yaml#/definitions/phandle diff --git a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml index ddea3d41971d..22cf9002fee7 100644 --- a/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml +++ b/Documentation/devicetree/bindings/soc/ti/k3-ringacc.yaml @@ -25,6 +25,9 @@ description: | The Ring Accelerator is a hardware module that is responsible for accelerating management of the packet queues. The K3 SoCs can have more than one RA instances +allOf: + - $ref: /schemas/arm/keystone/ti,k3-sci-common.yaml# + properties: compatible: items: @@ -54,14 +57,6 @@ properties: $ref: /schemas/types.yaml#/definitions/uint32 description: TI-SCI RM subtype for GP ring range - ti,sci: - $ref: /schemas/types.yaml#/definitions/phandle-array - description: phandle on TI-SCI compatible System controller node - - ti,sci-dev-id: - $ref: /schemas/types.yaml#/definitions/uint32 - description: TI-SCI device id of the ring accelerator - required: - compatible - reg @@ -72,7 +67,7 @@ required: - ti,sci - ti,sci-dev-id -additionalProperties: false +unevaluatedProperties: false examples: - | From a222d7d96b586d4f1d54803c28383718f87730a9 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 25 Jan 2023 16:14:43 -0600 Subject: [PATCH 39/66] dt-bindings: phy: hisilicon: Fix 'hisilicon,eye-diagram-param' differing types 'hisilicon,eye-diagram-param' is also defined in hisilicon,phy-hi3670-pcie.yaml as a 'uint32-array'. Unify it to use 'uint32-array' everywhere. Reviewed-by: Mauro Carvalho Chehab Link: https://lore.kernel.org/r/20230125221444.3058631-1-robh@kernel.org Signed-off-by: Rob Herring --- .../devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml | 3 ++- .../devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml | 3 ++- 2 files changed, 4 insertions(+), 2 deletions(-) diff --git a/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml b/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml index 20b79e2e8b82..b11d9873854a 100644 --- a/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml +++ b/Documentation/devicetree/bindings/phy/hisilicon,hi3660-usb3.yaml @@ -27,7 +27,8 @@ properties: description: phandle of syscon used to control usb tcxo. hisilicon,eye-diagram-param: - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32-array + maxItems: 1 description: Eye diagram for phy. required: diff --git a/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml b/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml index 1cb00dbcd4c5..3c69aca6c7eb 100644 --- a/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml +++ b/Documentation/devicetree/bindings/phy/hisilicon,hi3670-usb3.yaml @@ -32,7 +32,8 @@ properties: description: phandle of syscon used to control phy deep sleep. hisilicon,eye-diagram-param: - $ref: /schemas/types.yaml#/definitions/uint32 + $ref: /schemas/types.yaml#/definitions/uint32-array + maxItems: 1 description: Eye diagram for phy. hisilicon,tx-vboost-lvl: From f3531d1acb4b7177c049211994807b74b231e870 Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Sun, 29 Jan 2023 17:05:37 +0100 Subject: [PATCH 40/66] dt-bindings: display: bridge: sil,sii8620: convert to dtschema Convert the Silicon Image SiI8620 HDMI/MHL bridge bindings to DT schema. Signed-off-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230129160537.32275-1-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- .../bindings/display/bridge/sil,sii8620.yaml | 108 ++++++++++++++++++ .../bindings/display/bridge/sil-sii8620.txt | 33 ------ 2 files changed, 108 insertions(+), 33 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml delete mode 100644 Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt diff --git a/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml b/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml new file mode 100644 index 000000000000..6d1a36b76fcb --- /dev/null +++ b/Documentation/devicetree/bindings/display/bridge/sil,sii8620.yaml @@ -0,0 +1,108 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/display/bridge/sil,sii8620.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Silicon Image SiI8620 HDMI/MHL bridge + +maintainers: + - Krzysztof Kozlowski + +properties: + compatible: + const: sil,sii8620 + + reg: + maxItems: 1 + + clocks: + maxItems: 1 + + clock-names: + items: + - const: xtal + + cvcc10-supply: + description: Digital Core Supply Voltage (1.0V) + + interrupts: + maxItems: 1 + + iovcc18-supply: + description: I/O Supply Voltage (1.8V) + + reset-gpios: + maxItems: 1 + + ports: + $ref: /schemas/graph.yaml#/properties/ports + unevaluatedProperties: false + + properties: + port@0: + $ref: /schemas/graph.yaml#/properties/port + description: + Video port for HDMI (encoder) input + + port@1: + $ref: /schemas/graph.yaml#/properties/port + description: + MHL to connector port + + required: + - port@0 + - port@1 + +required: + - compatible + - reg + - clocks + - cvcc10-supply + - interrupts + - iovcc18-supply + - reset-gpios + - ports + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + bridge@39 { + reg = <0x39>; + compatible = "sil,sii8620"; + cvcc10-supply = <&ldo36_reg>; + iovcc18-supply = <&ldo34_reg>; + interrupt-parent = <&gpf0>; + interrupts = <2 IRQ_TYPE_LEVEL_HIGH>; + reset-gpios = <&gpv7 0 GPIO_ACTIVE_LOW>; + clocks = <&pmu_system_controller 0>; + clock-names = "xtal"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + mhl_to_hdmi: endpoint { + remote-endpoint = <&hdmi_to_mhl>; + }; + }; + + port@1 { + reg = <1>; + mhl_to_musb_con: endpoint { + remote-endpoint = <&musb_con_to_mhl>; + }; + }; + }; + }; + }; diff --git a/Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt b/Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt deleted file mode 100644 index b05052f7d62f..000000000000 --- a/Documentation/devicetree/bindings/display/bridge/sil-sii8620.txt +++ /dev/null @@ -1,33 +0,0 @@ -Silicon Image SiI8620 HDMI/MHL bridge bindings - -Required properties: - - compatible: "sil,sii8620" - - reg: i2c address of the bridge - - cvcc10-supply: Digital Core Supply Voltage (1.0V) - - iovcc18-supply: I/O Supply Voltage (1.8V) - - interrupts: interrupt specifier of INT pin - - reset-gpios: gpio specifier of RESET pin - - clocks, clock-names: specification and name of "xtal" clock - - video interfaces: Device node can contain video interface port - node for HDMI encoder according to [1]. - -[1]: Documentation/devicetree/bindings/media/video-interfaces.txt - -Example: - sii8620@39 { - reg = <0x39>; - compatible = "sil,sii8620"; - cvcc10-supply = <&ldo36_reg>; - iovcc18-supply = <&ldo34_reg>; - interrupt-parent = <&gpf0>; - interrupts = <2 0>; - reset-gpio = <&gpv7 0 0>; - clocks = <&pmu_system_controller 0>; - clock-names = "xtal"; - - port { - mhl_to_hdmi: endpoint { - remote-endpoint = <&hdmi_to_mhl>; - }; - }; - }; From df4fdd0db4756f8d08285e4a93fa40056aefefbe Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Tue, 24 Jan 2023 16:20:23 -0600 Subject: [PATCH 41/66] dt-bindings: firmware: arm,scmi: Restrict protocol child node properties The SCMI protocol child nodes are missing any constraints on unknown properties. Specifically, either 'unevaluatedProperties' or 'additionalProperties' is needed. The current structure with a regex match for all child nodes doesn't work for this purpose, so let's move the common properties '$defs' entry which each specific protocol node can reference and set 'unevaluatedProperties: false'. Reviewed-by: Sudeep Holla Link: https://lore.kernel.org/r/20230124222023.316089-1-robh@kernel.org Signed-off-by: Rob Herring --- .../bindings/firmware/arm,scmi.yaml | 43 ++++++++++++++----- 1 file changed, 33 insertions(+), 10 deletions(-) diff --git a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml index 176796931a22..2f7c51c75e85 100644 --- a/Documentation/devicetree/bindings/firmware/arm,scmi.yaml +++ b/Documentation/devicetree/bindings/firmware/arm,scmi.yaml @@ -100,7 +100,9 @@ properties: Channel specifier required when using OP-TEE transport. protocol@11: - type: object + $ref: '#/$defs/protocol-node' + unevaluatedProperties: false + properties: reg: const: 0x11 @@ -112,7 +114,9 @@ properties: - '#power-domain-cells' protocol@13: - type: object + $ref: '#/$defs/protocol-node' + unevaluatedProperties: false + properties: reg: const: 0x13 @@ -124,7 +128,9 @@ properties: - '#clock-cells' protocol@14: - type: object + $ref: '#/$defs/protocol-node' + unevaluatedProperties: false + properties: reg: const: 0x14 @@ -136,7 +142,9 @@ properties: - '#clock-cells' protocol@15: - type: object + $ref: '#/$defs/protocol-node' + unevaluatedProperties: false + properties: reg: const: 0x15 @@ -148,7 +156,9 @@ properties: - '#thermal-sensor-cells' protocol@16: - type: object + $ref: '#/$defs/protocol-node' + unevaluatedProperties: false + properties: reg: const: 0x16 @@ -160,20 +170,31 @@ properties: - '#reset-cells' protocol@17: - type: object + $ref: '#/$defs/protocol-node' + unevaluatedProperties: false + properties: reg: const: 0x17 regulators: type: object + additionalProperties: false description: The list of all regulators provided by this SCMI controller. + properties: + '#address-cells': + const: 1 + + '#size-cells': + const: 0 + patternProperties: - '^regulators@[0-9a-f]+$': + '^regulator@[0-9a-f]+$': type: object $ref: "../regulator/regulator.yaml#" + unevaluatedProperties: false properties: reg: @@ -184,15 +205,17 @@ properties: - reg protocol@18: - type: object + $ref: '#/$defs/protocol-node' + unevaluatedProperties: false + properties: reg: const: 0x18 additionalProperties: false -patternProperties: - '^protocol@[0-9a-f]+$': +$defs: + protocol-node: type: object description: Each sub-node represents a protocol supported. If the platform From 20f6d4f2a474fc2dc502358dcee3c9b18304ec1e Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Thomas=20Wei=C3=9Fschuh?= Date: Sat, 4 Feb 2023 05:47:03 +0000 Subject: [PATCH 42/66] of: make of_node_ktype constant MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Since commit ee6d3dd4ed48 ("driver core: make kobj_type constant.") the driver core allows the usage of const struct kobj_type. Take advantage of this to constify the structure definition to prevent modification at runtime. Signed-off-by: Thomas Weißschuh Link: https://lore.kernel.org/r/20230204-kobj_type-of-v1-1-5910c8ecb7a3@weissschuh.net Signed-off-by: Rob Herring --- drivers/of/kobj.c | 2 +- include/linux/of.h | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/of/kobj.c b/drivers/of/kobj.c index 7d3853a5a09a..3dbce1e6f184 100644 --- a/drivers/of/kobj.c +++ b/drivers/of/kobj.c @@ -24,7 +24,7 @@ static void of_node_release(struct kobject *kobj) } #endif /* CONFIG_OF_DYNAMIC */ -struct kobj_type of_node_ktype = { +const struct kobj_type of_node_ktype = { .release = of_node_release, }; diff --git a/include/linux/of.h b/include/linux/of.h index 8b9f94386dc3..8bb348666709 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -101,7 +101,7 @@ struct of_reconfig_data { }; /* initialize a node */ -extern struct kobj_type of_node_ktype; +extern const struct kobj_type of_node_ktype; extern const struct fwnode_operations of_fwnode_ops; static inline void of_node_init(struct device_node *node) { From ec340077a8477020a347ee2e7cd7415efeec3898 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Fri, 3 Feb 2023 09:13:46 -0600 Subject: [PATCH 43/66] scripts/dtc: Update to upstream version v1.6.1-66-gabbd523bae6e This adds the following commits from upstream: abbd523bae6e pylibfdt: Work-around SWIG limitations with flexible arrays a41509bea3e7 libfdt: Replace deprecated 0-length arrays with proper flexible arrays 2cd89f862cdb dtc: Warning rather than error on possible truncation of cell values Reviewed-by: Kees Cook Link: https://lore.kernel.org/all/20230203172430.474431-1-robh@kernel.org/ Signed-off-by: Rob Herring --- scripts/dtc/dtc-parser.y | 11 ++++++++--- scripts/dtc/libfdt/fdt.h | 4 ++-- scripts/dtc/version_gen.h | 2 +- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/scripts/dtc/dtc-parser.y b/scripts/dtc/dtc-parser.y index 46457d4bc0aa..bff1337ec266 100644 --- a/scripts/dtc/dtc-parser.y +++ b/scripts/dtc/dtc-parser.y @@ -404,9 +404,14 @@ arrayprefix: * within the mask to one (i.e. | in the * mask), all bits are one. */ - if (($2 > mask) && (($2 | mask) != -1ULL)) - ERROR(&@2, "Value out of range for" - " %d-bit array element", $1.bits); + if (($2 > mask) && (($2 | mask) != -1ULL)) { + char *loc = srcpos_string(&@2); + fprintf(stderr, + "WARNING: %s: Value 0x%016" PRIx64 + " truncated to 0x%0*" PRIx64 "\n", + loc, $2, $1.bits / 4, ($2 & mask)); + free(loc); + } } $$.data = data_append_integer($1.data, $2, $1.bits); diff --git a/scripts/dtc/libfdt/fdt.h b/scripts/dtc/libfdt/fdt.h index f2e68807f277..0c91aa7f67b5 100644 --- a/scripts/dtc/libfdt/fdt.h +++ b/scripts/dtc/libfdt/fdt.h @@ -35,14 +35,14 @@ struct fdt_reserve_entry { struct fdt_node_header { fdt32_t tag; - char name[0]; + char name[]; }; struct fdt_property { fdt32_t tag; fdt32_t len; fdt32_t nameoff; - char data[0]; + char data[]; }; #endif /* !__ASSEMBLY */ diff --git a/scripts/dtc/version_gen.h b/scripts/dtc/version_gen.h index 0f303087b043..99614ec1a289 100644 --- a/scripts/dtc/version_gen.h +++ b/scripts/dtc/version_gen.h @@ -1 +1 @@ -#define DTC_VERSION "DTC 1.6.1-g55778a03" +#define DTC_VERSION "DTC 1.6.1-gabbd523b" From f9b8556d5799b612404e19b21dd7624d551f71df Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Thu, 22 Dec 2022 15:28:53 +0100 Subject: [PATCH 44/66] dt-bindings: usb: convert fcs,fusb302.txt to yaml Convert fcs,fusb302.txt to yaml. Changed: Add vbus-supply property Signed-off-by: Johan Jonker Reviewed-by: Rob Herring Link: https://lore.kernel.org/r/0336a3c4-4a43-c983-11d7-e2ae16187fc8@gmail.com Signed-off-by: Rob Herring --- .../devicetree/bindings/usb/fcs,fusb302.txt | 34 ---------- .../devicetree/bindings/usb/fcs,fusb302.yaml | 67 +++++++++++++++++++ 2 files changed, 67 insertions(+), 34 deletions(-) delete mode 100644 Documentation/devicetree/bindings/usb/fcs,fusb302.txt create mode 100644 Documentation/devicetree/bindings/usb/fcs,fusb302.yaml diff --git a/Documentation/devicetree/bindings/usb/fcs,fusb302.txt b/Documentation/devicetree/bindings/usb/fcs,fusb302.txt deleted file mode 100644 index 60e4654297af..000000000000 --- a/Documentation/devicetree/bindings/usb/fcs,fusb302.txt +++ /dev/null @@ -1,34 +0,0 @@ -Fairchild FUSB302 Type-C Port controllers - -Required properties : -- compatible : "fcs,fusb302" -- reg : I2C slave address -- interrupts : Interrupt specifier - -Required sub-node: -- connector : The "usb-c-connector" attached to the FUSB302 IC. The bindings - of the connector node are specified in: - - Documentation/devicetree/bindings/connector/usb-connector.yaml - - -Example: - -fusb302: typec-portc@54 { - compatible = "fcs,fusb302"; - reg = <0x54>; - interrupt-parent = <&nmi_intc>; - interrupts = <0 IRQ_TYPE_LEVEL_LOW>; - - usb_con: connector { - compatible = "usb-c-connector"; - label = "USB-C"; - power-role = "dual"; - try-power-role = "sink"; - source-pdos = ; - sink-pdos = ; - op-sink-microwatt = <10000000>; - }; -}; diff --git a/Documentation/devicetree/bindings/usb/fcs,fusb302.yaml b/Documentation/devicetree/bindings/usb/fcs,fusb302.yaml new file mode 100644 index 000000000000..b396ea0ab10c --- /dev/null +++ b/Documentation/devicetree/bindings/usb/fcs,fusb302.yaml @@ -0,0 +1,67 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/usb/fcs,fusb302.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Fairchild FUSB302 Type-C Port controller + +maintainers: + - Rob Herring + +properties: + compatible: + const: fcs,fusb302 + + reg: + maxItems: 1 + + interrupts: + maxItems: 1 + + vbus-supply: + description: VBUS power supply + + connector: + type: object + $ref: /schemas/connector/usb-connector.yaml# + unevaluatedProperties: false + +required: + - compatible + - reg + - interrupts + - vbus-supply + - connector + +additionalProperties: false + +examples: + - | + #include + #include + + i2c { + #address-cells = <1>; + #size-cells = <0>; + + typec-portc@54 { + compatible = "fcs,fusb302"; + reg = <0x54>; + interrupt-parent = <&nmi_intc>; + interrupts = <0 IRQ_TYPE_LEVEL_LOW>; + vbus-supply = <&vbus_typec>; + + connector { + compatible = "usb-c-connector"; + label = "USB-C"; + power-role = "dual"; + try-power-role = "sink"; + source-pdos = ; + sink-pdos = ; + op-sink-microwatt = <10000000>; + }; + }; + }; From 33887fce47e17cdd4df44f3d98320a27908897fa Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 6 Feb 2023 10:26:22 +0100 Subject: [PATCH 45/66] dt-bindings: intel,ixp4xx-expansion-bus: split out peripheral properties The properties of devices in IXP4xx expansion bus need to be also applied to actual devices' bindings. Prepare for this by splitting them to separate intel,ixp4xx-expansion-peripheral-props binding, just like other memory-controller peripheral properties. Signed-off-by: Krzysztof Kozlowski Acked-by: Linus Walleij Acked-by: Greg Kroah-Hartman Link: https://lore.kernel.org/r/20230206092624.22922-2-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- ...intel,ixp4xx-expansion-bus-controller.yaml | 66 +-------------- ...tel,ixp4xx-expansion-peripheral-props.yaml | 80 +++++++++++++++++++ .../mc-peripheral-props.yaml | 1 + MAINTAINERS | 2 +- 4 files changed, 84 insertions(+), 65 deletions(-) rename Documentation/devicetree/bindings/{bus => memory-controllers}/intel,ixp4xx-expansion-bus-controller.yaml (57%) create mode 100644 Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml diff --git a/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml similarity index 57% rename from Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml rename to Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml index 5fb4e7bfa4da..188db821dff3 100644 --- a/Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml @@ -1,7 +1,7 @@ # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) %YAML 1.2 --- -$id: http://devicetree.org/schemas/bus/intel,ixp4xx-expansion-bus-controller.yaml# +$id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-bus-controller.yaml# $schema: http://devicetree.org/meta-schemas/core.yaml# title: Intel IXP4xx Expansion Bus Controller @@ -56,69 +56,7 @@ patternProperties: description: Devices attached to chip selects are represented as subnodes. type: object - - properties: - intel,ixp4xx-eb-t1: - description: Address timing, extend address phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 3 - - intel,ixp4xx-eb-t2: - description: Setup chip select timing, extend setup phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 3 - - intel,ixp4xx-eb-t3: - description: Strobe timing, extend strobe phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 15 - - intel,ixp4xx-eb-t4: - description: Hold timing, extend hold phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 3 - - intel,ixp4xx-eb-t5: - description: Recovery timing, extend recovery phase with n cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - maximum: 15 - - intel,ixp4xx-eb-cycle-type: - description: The type of cycles to use on the expansion bus for this - chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1, 2] - - intel,ixp4xx-eb-byte-access-on-halfword: - description: Allow byte read access on half word devices. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-hpi-hrdy-pol-high: - description: Set HPI HRDY polarity to active high when using HPI. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-mux-address-and-data: - description: Multiplex address and data on the data bus. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-ahb-split-transfers: - description: Enable AHB split transfers. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-write-enable: - description: Enable write cycles. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] - - intel,ixp4xx-eb-byte-access: - description: Expansion bus uses only 8 bits. The default is to use - 16 bits. - $ref: /schemas/types.yaml#/definitions/uint32 - enum: [0, 1] + $ref: /schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml# required: - compatible diff --git a/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml new file mode 100644 index 000000000000..d1479a7b9c8d --- /dev/null +++ b/Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml @@ -0,0 +1,80 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Peripheral properties for Intel IXP4xx Expansion Bus + +description: + The IXP4xx expansion bus controller handles access to devices on the + memory-mapped expansion bus on the Intel IXP4xx family of system on chips, + including IXP42x, IXP43x, IXP45x and IXP46x. + +maintainers: + - Linus Walleij + +properties: + intel,ixp4xx-eb-t1: + description: Address timing, extend address phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + intel,ixp4xx-eb-t2: + description: Setup chip select timing, extend setup phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + intel,ixp4xx-eb-t3: + description: Strobe timing, extend strobe phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + + intel,ixp4xx-eb-t4: + description: Hold timing, extend hold phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 3 + + intel,ixp4xx-eb-t5: + description: Recovery timing, extend recovery phase with n cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + maximum: 15 + + intel,ixp4xx-eb-cycle-type: + description: The type of cycles to use on the expansion bus for this + chip select. 0 = Intel cycles, 1 = Motorola cycles, 2 = HPI cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1, 2] + + intel,ixp4xx-eb-byte-access-on-halfword: + description: Allow byte read access on half word devices. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-hpi-hrdy-pol-high: + description: Set HPI HRDY polarity to active high when using HPI. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-mux-address-and-data: + description: Multiplex address and data on the data bus. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-ahb-split-transfers: + description: Enable AHB split transfers. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-write-enable: + description: Enable write cycles. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + + intel,ixp4xx-eb-byte-access: + description: Expansion bus uses only 8 bits. The default is to use + 16 bits. + $ref: /schemas/types.yaml#/definitions/uint32 + enum: [0, 1] + +additionalProperties: true diff --git a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml index 53ae995462db..5acfcad12bb7 100644 --- a/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml +++ b/Documentation/devicetree/bindings/memory-controllers/mc-peripheral-props.yaml @@ -34,5 +34,6 @@ required: # The controller specific properties go here. allOf: - $ref: st,stm32-fmc2-ebi-props.yaml# + - $ref: intel,ixp4xx-expansion-peripheral-props.yaml# additionalProperties: true diff --git a/MAINTAINERS b/MAINTAINERS index 04d8cc852e77..06d5be2c713c 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2326,7 +2326,7 @@ M: Krzysztof Halasa L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers) S: Maintained F: Documentation/devicetree/bindings/arm/intel-ixp4xx.yaml -F: Documentation/devicetree/bindings/bus/intel,ixp4xx-expansion-bus-controller.yaml +F: Documentation/devicetree/bindings/memory-controllers/intel,ixp4xx-expansion* F: Documentation/devicetree/bindings/gpio/intel,ixp4xx-gpio.txt F: Documentation/devicetree/bindings/interrupt-controller/intel,ixp4xx-interrupt.yaml F: Documentation/devicetree/bindings/timer/intel,ixp4xx-timer.yaml From 770ba14bd7fca8a25e6f73ac25dc2cd1377be6fa Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 6 Feb 2023 10:26:23 +0100 Subject: [PATCH 46/66] dt-bindings: reference MC peripheral properties in relevant devices Several devices can be attached to memory controllers (or memory-mapped buses), thus they can come with additional controller-specific properties, e.g. devices wired under Intel IXP4XX bus: cfi-flash, intel,ixp4xx-compact-flash, NS8250 serial and MAX6369 watchdog. Referencing Memory Controller or IXP4XX bus peripheral properties fixes few dtbs_check warnings like: intel-ixp42x-gateworks-gw2348.dtb: ide@1,0: Unevaluated properties are not allowed ('intel,ixp4xx-eb-ahb-split-transfers', 'intel,ixp4xx-eb-byte-access', ... ' were unexpected) Signed-off-by: Krzysztof Kozlowski Acked-by: Linus Walleij Acked-by: Damien Le Moal Acked-by: Greg Kroah-Hartman Reviewed-by: Miquel Raynal Link: https://lore.kernel.org/r/20230206092624.22922-3-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- .../devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml | 1 + Documentation/devicetree/bindings/mtd/mtd-physmap.yaml | 1 + Documentation/devicetree/bindings/serial/8250.yaml | 1 + Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml | 1 + 4 files changed, 4 insertions(+) diff --git a/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml b/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml index 52e18600ecff..378692010c56 100644 --- a/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml +++ b/Documentation/devicetree/bindings/ata/intel,ixp4xx-compact-flash.yaml @@ -35,6 +35,7 @@ required: allOf: - $ref: pata-common.yaml# + - $ref: /schemas/memory-controllers/intel,ixp4xx-expansion-peripheral-props.yaml# unevaluatedProperties: false diff --git a/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml b/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml index 5df94953c34e..44cd4476d1d3 100644 --- a/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml +++ b/Documentation/devicetree/bindings/mtd/mtd-physmap.yaml @@ -15,6 +15,7 @@ description: | allOf: - $ref: "mtd.yaml#" + - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# properties: compatible: diff --git a/Documentation/devicetree/bindings/serial/8250.yaml b/Documentation/devicetree/bindings/serial/8250.yaml index 34b8e59aa9d4..09b40ef59ba3 100644 --- a/Documentation/devicetree/bindings/serial/8250.yaml +++ b/Documentation/devicetree/bindings/serial/8250.yaml @@ -11,6 +11,7 @@ maintainers: allOf: - $ref: serial.yaml# + - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# - if: anyOf: - required: diff --git a/Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml b/Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml index ab9641e845db..38079e1b6a44 100644 --- a/Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml +++ b/Documentation/devicetree/bindings/watchdog/maxim,max63xx.yaml @@ -8,6 +8,7 @@ title: Maxim 63xx Watchdog Timers allOf: - $ref: "watchdog.yaml#" + - $ref: /schemas/memory-controllers/mc-peripheral-props.yaml# maintainers: - Marc Zyngier From 0c559bc8abfb60695beacfc72993dff035d0267f Mon Sep 17 00:00:00 2001 From: Krzysztof Kozlowski Date: Mon, 6 Feb 2023 10:26:24 +0100 Subject: [PATCH 47/66] dt-bindings: serial: restrict possible child node names The re-usable serial.yaml schema matches every property with ".*" pattern, thus any other schema referencing it will not report unknown (unevaluated) properties. This hides several wrong properties. It is a limitation of dtschema, thus provide a simple workaround: expect children to be only of few names matching upstream usage (Bluetooth, GNSS, GPS and MCU). Signed-off-by: Krzysztof Kozlowski Acked-by: Linus Walleij Acked-by: Greg Kroah-Hartman Link: https://lore.kernel.org/r/20230206092624.22922-4-krzysztof.kozlowski@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/serial/serial.yaml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/serial/serial.yaml b/Documentation/devicetree/bindings/serial/serial.yaml index 11e822bf09e2..21992e9a3c2b 100644 --- a/Documentation/devicetree/bindings/serial/serial.yaml +++ b/Documentation/devicetree/bindings/serial/serial.yaml @@ -96,7 +96,7 @@ then: rts-gpios: false patternProperties: - ".*": + "^bluetooth|gnss|gps|mcu$": if: type: object then: From aeb9267eb6b1df992e39467a620da8fdf434df54 Mon Sep 17 00:00:00 2001 From: Martin Liu Date: Fri, 10 Feb 2023 00:09:55 +0800 Subject: [PATCH 48/66] of: reserved-mem: print out reserved-mem details during boot It's important to know reserved-mem information in mobile world since reserved memory via device tree keeps increased in platform (e.g., 45% in our platform). Therefore, it's crucial to know the reserved memory sizes breakdown for the memory accounting. This patch prints out reserved memory details during boot to make them visible. Below is an example output: [ 0.000000] OF: reserved mem: 0x00000009f9400000..0x00000009fb3fffff ( 32768 KB ) map reusable test1 [ 0.000000] OF: reserved mem: 0x00000000ffdf0000..0x00000000ffffffff ( 2112 KB ) map non-reusable test2 [ 0.000000] OF: reserved mem: 0x0000000091000000..0x00000000912fffff ( 3072 KB ) nomap non-reusable test3 Signed-off-by: Martin Liu Link: https://lore.kernel.org/r/20230209160954.1471909-1-liumartin@google.com Signed-off-by: Rob Herring --- drivers/of/of_reserved_mem.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c index 65f3b02a0e4e..00e75064ca19 100644 --- a/drivers/of/of_reserved_mem.c +++ b/drivers/of/of_reserved_mem.c @@ -284,6 +284,16 @@ void __init fdt_init_reserved_mem(void) else memblock_phys_free(rmem->base, rmem->size); + } else { + phys_addr_t end = rmem->base + rmem->size - 1; + bool reusable = + (of_get_flat_dt_prop(node, "reusable", NULL)) != NULL; + + pr_info("%pa..%pa ( %lu KB ) %s %s %s\n", + &rmem->base, &end, (unsigned long)(rmem->size / SZ_1K), + nomap ? "nomap" : "map", + reusable ? "reusable" : "non-reusable", + rmem->name ? rmem->name : "unknown"); } } } From 25eba1598c8e1e804c02e3a0da50782c50c11c41 Mon Sep 17 00:00:00 2001 From: Cristian Ciocaltea Date: Thu, 9 Feb 2023 21:37:35 +0200 Subject: [PATCH 49/66] dt-bindings: Fix multi pattern support in DT_SCHEMA_FILES DT_SCHEMA_FILES used to allow specifying a space separated list of file paths, but the introduction of partial matches support broke this feature: $ make dtbs_check DT_SCHEMA_FILES="path/to/schema1.yaml path/to/schema2.yaml" [...] LINT Documentation/devicetree/bindings usage: yamllint [-h] [-] [-c CONFIG_FILE | -d CONFIG_DATA] [--list-files] [...] [-v] [FILE_OR_DIR ...] yamllint: error: one of the arguments FILE_OR_DIR - is required [...] Restore the lost functionality by preparing a grep filter that is able to handle multiple search patterns. Additionally, as suggested by Rob, use ':' instead of ' ' as the patterns separator char. Hence, the command above becomes: $ make dtbs_check DT_SCHEMA_FILES="path/to/schema1.yaml:path/to/schema2.yaml" Fixes: 309d955985ee ("dt-bindings: kbuild: Support partial matches with DT_SCHEMA_FILES") Signed-off-by: Cristian Ciocaltea Link: https://lore.kernel.org/r/20230209193735.795288-1-cristian.ciocaltea@collabora.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/Makefile | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/devicetree/bindings/Makefile b/Documentation/devicetree/bindings/Makefile index bf2d8a8ced77..8b395893bd85 100644 --- a/Documentation/devicetree/bindings/Makefile +++ b/Documentation/devicetree/bindings/Makefile @@ -28,7 +28,7 @@ $(obj)/%.example.dts: $(src)/%.yaml check_dtschema_version FORCE find_all_cmd = find $(srctree)/$(src) \( -name '*.yaml' ! \ -name 'processed-schema*' \) -find_cmd = $(find_all_cmd) | grep -F "$(DT_SCHEMA_FILES)" +find_cmd = $(find_all_cmd) | grep -F -e "$(subst :," -e ",$(DT_SCHEMA_FILES))" CHK_DT_DOCS := $(shell $(find_cmd)) quiet_cmd_yamllint = LINT $(src) From 6ee7afbabcee4d54024c46f8fc74314c69a04613 Mon Sep 17 00:00:00 2001 From: Geert Uytterhoeven Date: Thu, 16 Feb 2023 09:37:25 +0100 Subject: [PATCH 50/66] of: reserved_mem: Use proper binary prefix The printed reserved memory information uses the non-standard "K" prefix, while all other printed values use proper binary prefixes. Fix this by using "Ki" instead. While at it, drop the superfluous spaces inside the parentheses, to reduce printed line length. Fixes: aeb9267eb6b1df99 ("of: reserved-mem: print out reserved-mem details during boot") Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20230216083725.1244817-1-geert+renesas@glider.be Signed-off-by: Rob Herring --- drivers/of/of_reserved_mem.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/of/of_reserved_mem.c b/drivers/of/of_reserved_mem.c index 00e75064ca19..9f7127297f4d 100644 --- a/drivers/of/of_reserved_mem.c +++ b/drivers/of/of_reserved_mem.c @@ -289,7 +289,7 @@ void __init fdt_init_reserved_mem(void) bool reusable = (of_get_flat_dt_prop(node, "reusable", NULL)) != NULL; - pr_info("%pa..%pa ( %lu KB ) %s %s %s\n", + pr_info("%pa..%pa (%lu KiB) %s %s %s\n", &rmem->base, &end, (unsigned long)(rmem->size / SZ_1K), nomap ? "nomap" : "map", reusable ? "reusable" : "non-reusable", From 9cbad37ce8122de32a1529e394b468bc101c9e7f Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 9 Feb 2023 15:35:01 -0600 Subject: [PATCH 51/66] of: Add of_property_present() helper Add an of_property_present() function similar to fwnode_property_present(). of_property_read_bool() could be used directly, but it is cleaner to not use it on non-boolean properties. Reviewed-by: Frank Rowand Tested-by: Frank Rowand Link: https://lore.kernel.org/all/20230215215547.691573-1-robh@kernel.org/ Signed-off-by: Rob Herring --- include/linux/of.h | 17 ++++++++++++++++- 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/include/linux/of.h b/include/linux/of.h index 8bb348666709..37afd04f36eb 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -1155,7 +1155,8 @@ static inline int of_property_read_string_index(const struct device_node *np, * @np: device node from which the property value is to be read. * @propname: name of the property to be searched. * - * Search for a property in a device node. + * Search for a boolean property in a device node. Usage on non-boolean + * property types is deprecated. * * Return: true if the property exists false otherwise. */ @@ -1167,6 +1168,20 @@ static inline bool of_property_read_bool(const struct device_node *np, return prop ? true : false; } +/** + * of_property_present - Test if a property is present in a node + * @np: device node to search for the property. + * @propname: name of the property to be searched. + * + * Test for a property present in a device node. + * + * Return: true if the property exists false otherwise. + */ +static inline bool of_property_present(const struct device_node *np, const char *propname) +{ + return of_property_read_bool(np, propname); +} + /** * of_property_read_u8_array - Find and read an array of u8 from a property. * From 2f0cb4753dd2b5fe71d04407213e2ef253dcdd32 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Thu, 9 Feb 2023 17:20:43 -0600 Subject: [PATCH 52/66] of: Use of_property_present() helper Use of_property_present() instead of of_get_property/of_find_property() in places where we just need to test presence of a property. Reviewed-by: Frank Rowand Tested-by: Frank Rowand Link: https://lore.kernel.org/all/20230215215547.691573-2-robh@kernel.org/ Signed-off-by: Rob Herring --- drivers/of/platform.c | 2 +- drivers/of/property.c | 2 +- 2 files changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/of/platform.c b/drivers/of/platform.c index 81c8c227ab6b..f7d796b54039 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -528,7 +528,7 @@ static int __init of_platform_default_populate_init(void) int ret; /* Check if we have a MacOS display without a node spec */ - if (of_get_property(of_chosen, "linux,bootx-noscreen", NULL)) { + if (of_property_present(of_chosen, "linux,bootx-noscreen")) { /* * The old code tried to work out which node was the MacOS * display based on the address. I'm dropping that since the diff --git a/drivers/of/property.c b/drivers/of/property.c index 134cfc980b70..ff71d2ac26cb 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -1086,7 +1086,7 @@ static struct device_node *of_get_compat_node(struct device_node *np) np = NULL; } - if (of_find_property(np, "compatible", NULL)) + if (of_property_present(np, "compatible")) break; np = of_get_next_parent(np); From 16b0c7cad99e96b002e26f016f28150cc7c52514 Mon Sep 17 00:00:00 2001 From: Rob Herring Date: Wed, 8 Feb 2023 17:13:23 -0600 Subject: [PATCH 53/66] of: Use preferred of_property_read_* functions Replace instances of of_get_property/of_find_property() with appropriate typed of_property_read_*() functions. Link: https://lore.kernel.org/all/20230215215502.690716-1-robh@kernel.org/ Signed-off-by: Rob Herring --- drivers/of/platform.c | 5 +---- drivers/of/property.c | 2 +- 2 files changed, 2 insertions(+), 5 deletions(-) diff --git a/drivers/of/platform.c b/drivers/of/platform.c index f7d796b54039..9f015ad73288 100644 --- a/drivers/of/platform.c +++ b/drivers/of/platform.c @@ -222,7 +222,6 @@ static struct amba_device *of_amba_device_create(struct device_node *node, struct device *parent) { struct amba_device *dev; - const void *prop; int ret; pr_debug("Creating amba device %pOF\n", node); @@ -250,9 +249,7 @@ static struct amba_device *of_amba_device_create(struct device_node *node, of_device_make_bus_id(&dev->dev); /* Allow the HW Peripheral ID to be overridden */ - prop = of_get_property(node, "arm,primecell-periphid", NULL); - if (prop) - dev->periphid = of_read_ulong(prop, 1); + of_property_read_u32(node, "arm,primecell-periphid", &dev->periphid); ret = of_address_to_resource(node, 0, &dev->res); if (ret) { diff --git a/drivers/of/property.c b/drivers/of/property.c index ff71d2ac26cb..a229536f7564 100644 --- a/drivers/of/property.c +++ b/drivers/of/property.c @@ -1358,7 +1358,7 @@ static struct device_node *parse_gpio_compat(struct device_node *np, * Ignore node with gpio-hog property since its gpios are all provided * by its parent. */ - if (of_find_property(np, "gpio-hog", NULL)) + if (of_property_read_bool(np, "gpio-hog")) return NULL; if (of_parse_phandle_with_args(np, prop_name, "#gpio-cells", index, From 511f3aa71029ef4d9408065f94110c0e8f9dccba Mon Sep 17 00:00:00 2001 From: Frank Rowand Date: Mon, 13 Feb 2023 12:56:56 -0600 Subject: [PATCH 54/66] of: prepare to add processing of EXPECT_NOT to of_unittest_expect scripts/dtc/of_unittest_expect processes EXPECT messages that document expected kernel messages triggered by unittest. Add processing of EXPECT_NOT messages that document kernel messages triggered by unittest that are not expected. This is commit 1 of 2, renaming existing variables in anticipation of the changes needed to process EXPECT_NOT, so that commit 2 of 2 will be smaller and easier to read. This commit is not intended to make any functional changes. Signed-off-by: Frank Rowand Link: https://lore.kernel.org/r/20230213185702.395776-2-frowand.list@gmail.com Signed-off-by: Rob Herring --- scripts/dtc/of_unittest_expect | 40 +++++++++++++++++----------------- 1 file changed, 20 insertions(+), 20 deletions(-) diff --git a/scripts/dtc/of_unittest_expect b/scripts/dtc/of_unittest_expect index 96b12d9ea606..7b25bb693162 100755 --- a/scripts/dtc/of_unittest_expect +++ b/scripts/dtc/of_unittest_expect @@ -9,7 +9,7 @@ # on the console log that results from executing the Linux kernel # devicetree unittest (drivers/of/unitest.c). -$VUFX = "220201a"; +$VUFX = "230121a"; use strict 'refs'; use strict subs; @@ -274,7 +274,7 @@ while ($line = ) { if ($line =~ /^\s*$exp_begin/) { $data = $line; $data =~ s/^\s*$exp_begin//; - push @begin, $data; + push @exp_begin_stack, $data; if ($verbose) { if ($print_line_num) { @@ -302,20 +302,20 @@ while ($line = ) { $found = 0; $no_begin = 0; - if (@found_or_begin > 0) { - $begin = pop @found_or_begin; + if (@exp_found_or_begin > 0) { + $begin = pop @exp_found_or_begin; if (compare($data, $begin)) { $found = 1; } } elsif (@begin > 0) { - $begin = pop @begin; + $begin = pop @exp_begin_stack; } else { $no_begin = 1; } if ($no_begin) { - $expect_missing_begin++; + $exp_missing_begin++; print "** ERROR: EXPECT end without any EXPECT begin:\n"; print " end ---> $line\n"; @@ -325,20 +325,20 @@ while ($line = ) { $line_num = sprintf("%4s ", $.); } - $expect_not_found++; + $exp_missing++; printf "** %s%s$script_name WARNING - not found ---> %s\n", $line_num, $timestamp, $data; } elsif (! compare($data, $begin)) { - $expect_missing_end++; + $exp_missing_end++; print "** ERROR: EXPECT end does not match EXPECT begin:\n"; print " begin -> $begin\n"; print " end ---> $line\n"; } else { - $expect_found++; + $exp_found++; } @@ -357,7 +357,7 @@ while ($line = ) { } $found = 0; - foreach $begin (@begin) { + foreach $begin (@exp_begin_stack) { if (compare($begin, $line)) { $found = 1; last; @@ -365,12 +365,12 @@ while ($line = ) { } if ($found) { - $begin = shift @begin; + $begin = shift @exp_begin_stack; while (! compare($begin, $line)) { - push @found_or_begin, $begin; - $begin = shift @begin; + push @exp_found_or_begin, $begin; + $begin = shift @exp_begin_stack; } - push @found_or_begin, $line; + push @exp_found_or_begin, $line; if ($hide_expect) { $suppress_line = 1; @@ -391,18 +391,18 @@ if (! $no_expect_stats) { print "\n"; print "** EXPECT statistics:\n"; print "**\n"; - printf "** EXPECT found : %4i\n", $expect_found; - printf "** EXPECT not found : %4i\n", $expect_not_found; - printf "** missing EXPECT begin : %4i\n", $expect_missing_begin; - printf "** missing EXPECT end : %4i\n", $expect_missing_end; + printf "** EXPECT found : %4i\n", $exp_found; + printf "** EXPECT not found : %4i\n", $exp_missing; + printf "** missing EXPECT begin : %4i\n", $exp_missing_begin; + printf "** missing EXPECT end : %4i\n", $exp_missing_end; printf "** unittest FAIL : %4i\n", $unittest_fail; printf "** internal error : %4i\n", $internal_err; } -if (@begin) { +if (@exp_begin_stack) { print "** ERROR: EXPECT begin without any EXPECT end:\n"; print " This list may be misleading.\n"; - foreach $begin (@begin) { + foreach $begin (@exp_begin_stack) { print " begin ---> $begin\n"; } } From 568a10bfffe88daa42f1b7968352cc6abd948ca3 Mon Sep 17 00:00:00 2001 From: Frank Rowand Date: Mon, 13 Feb 2023 12:56:57 -0600 Subject: [PATCH 55/66] of: add processing of EXPECT_NOT to of_unittest_expect scripts/dtc/of_unittest_expect processes EXPECT messages that document expected kernel messages triggered by unittest. Add processing of EXPECT_NOT messages that document kernel messages triggered by unittest that are not expected. This is commit 2 of 2, implementing the processing of EXPECT_NOT messages. Signed-off-by: Frank Rowand Link: https://lore.kernel.org/r/20230213185702.395776-3-frowand.list@gmail.com Signed-off-by: Rob Herring --- scripts/dtc/of_unittest_expect | 157 ++++++++++++++++++++++++++++++--- 1 file changed, 145 insertions(+), 12 deletions(-) diff --git a/scripts/dtc/of_unittest_expect b/scripts/dtc/of_unittest_expect index 7b25bb693162..0a535a8e9821 100755 --- a/scripts/dtc/of_unittest_expect +++ b/scripts/dtc/of_unittest_expect @@ -9,7 +9,7 @@ # on the console log that results from executing the Linux kernel # devicetree unittest (drivers/of/unitest.c). -$VUFX = "230121a"; +$VUFX = "230211a"; use strict 'refs'; use strict subs; @@ -62,6 +62,8 @@ sub compare { } else { return 0; } + } elsif ($type eq "all") { + return 1; } elsif ($type eq "") { if ($expect_next ne $got_next) { return 0; @@ -130,6 +132,7 @@ usage: <> matches: [+-]*[0-9]+ <> matches: (0x)*[0-9a-f]+ + <> matches: anything to end of line 'EXPECT \\' (begin) and 'EXPECT /' (end) lines are suppressed. @@ -240,6 +243,8 @@ if ($#ARGV != 0) { $pr_fmt = "### dt-test ### "; $exp_begin = "${pr_fmt}EXPECT \\\\ : "; $exp_end = "${pr_fmt}EXPECT / : "; +$expnot_begin = "${pr_fmt}EXPECT_NOT \\\\ : "; +$expnot_end = "${pr_fmt}EXPECT_NOT / : "; $line_num = ""; @@ -250,6 +255,8 @@ while ($line = ) { chomp $line; + $suppress_line = 0; + $prefix = " "; ## 2 characters @@ -306,6 +313,7 @@ while ($line = ) { $begin = pop @exp_found_or_begin; if (compare($data, $begin)) { $found = 1; + $exp_found++; } } elsif (@begin > 0) { $begin = pop @exp_begin_stack; @@ -316,7 +324,7 @@ while ($line = ) { if ($no_begin) { $exp_missing_begin++; - print "** ERROR: EXPECT end without any EXPECT begin:\n"; + print "** ERROR: EXPECT end without matching EXPECT begin:\n"; print " end ---> $line\n"; } elsif (! $found) { @@ -329,19 +337,99 @@ while ($line = ) { printf "** %s%s$script_name WARNING - not found ---> %s\n", $line_num, $timestamp, $data; - } elsif (! compare($data, $begin)) { + } elsif (! compare($data, $begin) and ($data ne $begin)) { $exp_missing_end++; print "** ERROR: EXPECT end does not match EXPECT begin:\n"; print " begin -> $begin\n"; print " end ---> $line\n"; + } + + next LINE; + } + + + # ----- find EXPECT_NOT begin + + if ($line =~ /^\s*$expnot_begin/) { + $data = $line; + $data =~ s/^\s*$expnot_begin//; + push @expnot_begin_stack, $data; + + if ($verbose) { + if ($print_line_num) { + $line_num = sprintf("%4s ", $.); + } + printf "%s %s%s%s\n", $prefix, $line_num, $timestamp, $line; + } + + next LINE; + } + + + # ----- find EXPECT_NOT end + + if ($line =~ /^\s*$expnot_end/) { + $data = $line; + $data =~ s/^\s*$expnot_end//; + + if ($verbose) { + if ($print_line_num) { + $line_num = sprintf("%4s ", $.); + } + printf "%s %s%s%s\n", $prefix, $line_num, $timestamp, $line; + } + + $found = 0; + $no_begin = 0; + if (@expnot_found_or_begin > 0) { + $begin = pop @expnot_found_or_begin; + if (compare($data, $begin)) { + $found = 1; + $expnot_found++; + } + } elsif (@expnot_begin_stack <= 0) { + $no_begin = 1; + } + + if ($no_begin) { + + $expnot_missing_begin++; + print "** ERROR: EXPECT_NOT end without matching EXPECT_NOT begin:\n"; + print " end ---> $line\n"; + + } + + if ($found) { + + if ($print_line_num) { + $line_num = sprintf("%4s ", $.); + } + + printf "** %s%s$script_name WARNING - next line matches EXPECT_NOT\n", + $line_num, $timestamp; + printf "** %s%s%s\n", $line_num, $timestamp, $line; + } else { - $exp_found++; + $expnot_missing++; } + if (@expnot_begin_stack > 0) { + $begin = pop @expnot_begin_stack; + + if (! compare($data, $begin) and ($data ne $begin)) { + + $expnot_missing_end++; + print "** ERROR: EXPECT_NOT end does not match EXPECT_NOT begin:\n"; + print " begin -> $begin\n"; + print " end ---> $line\n"; + + } + } + next LINE; } @@ -374,12 +462,38 @@ while ($line = ) { if ($hide_expect) { $suppress_line = 1; - next LINE; } $prefix = "ok"; # 2 characters } + $found = 0; + foreach $begin (@expnot_begin_stack) { + if (compare($begin, $line)) { + $found = 1; + last; + } + } + + if ($found) { + $begin = shift @begin; + while (! compare($begin, $line)) { + push @expnot_found_or_begin, $begin; + $begin = shift @begin; + } + push @expnot_found_or_begin, $line; + + if ($hide_expect) { + $suppress_line = 1; + } + $prefix = "**"; # 2 characters + } + + + if ($suppress_line) { + next LINE; + } + if ($print_line_num) { $line_num = sprintf("%4s ", $.); } @@ -391,18 +505,37 @@ if (! $no_expect_stats) { print "\n"; print "** EXPECT statistics:\n"; print "**\n"; - printf "** EXPECT found : %4i\n", $exp_found; - printf "** EXPECT not found : %4i\n", $exp_missing; - printf "** missing EXPECT begin : %4i\n", $exp_missing_begin; - printf "** missing EXPECT end : %4i\n", $exp_missing_end; - printf "** unittest FAIL : %4i\n", $unittest_fail; - printf "** internal error : %4i\n", $internal_err; + printf "** non-zero values expected:\n"; + print "**\n"; + printf "** EXPECT found : %4i\n", $exp_found; + printf "** EXPECT_NOT not found : %4i\n", $expnot_missing; + print "**\n"; + printf "** zero values expected:\n"; + print "**\n"; + printf "** EXPECT not found : %4i\n", $exp_missing; + printf "** missing EXPECT begin : %4i\n", $exp_missing_begin; + printf "** missing EXPECT end : %4i\n", $exp_missing_end; + print "**\n"; + printf "** EXPECT_NOT found : %4i\n", $expnot_found; + printf "** missing EXPECT_NOT begin : %4i\n", $expnot_missing_begin; + printf "** missing EXPECT_NOT end : %4i\n", $expnot_missing_end; + print "**\n"; + printf "** unittest FAIL : %4i\n", $unittest_fail; + printf "** internal error : %4i\n", $internal_err; } if (@exp_begin_stack) { - print "** ERROR: EXPECT begin without any EXPECT end:\n"; + print "** ERROR: EXPECT begin without matching EXPECT end:\n"; print " This list may be misleading.\n"; foreach $begin (@exp_begin_stack) { print " begin ---> $begin\n"; } } + +if (@expnot_begin_stack) { + print "** ERROR: EXPECT_NOT begin without matching EXPECT_NOT end:\n"; + print " This list may be misleading.\n"; + foreach $begin (@expnot_begin_stack) { + print " begin ---> $begin\n"; + } +} From f381b31a80bc47102f5a3f3001d8e45c328eb548 Mon Sep 17 00:00:00 2001 From: Frank Rowand Date: Mon, 13 Feb 2023 12:56:58 -0600 Subject: [PATCH 56/66] of: update kconfig unittest help Add more information about the impact the of unittests have on the live devicetree and why the tests should only be enabled for developer kernels. Add information about processing the test output such that the results are more complete and comprehendable. Signed-off-by: Frank Rowand Link: https://lore.kernel.org/r/20230213185702.395776-4-frowand.list@gmail.com Signed-off-by: Rob Herring --- drivers/of/Kconfig | 14 +++++++++++++- 1 file changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/of/Kconfig b/drivers/of/Kconfig index 80b5fd44ab1c..644386833a7b 100644 --- a/drivers/of/Kconfig +++ b/drivers/of/Kconfig @@ -23,7 +23,19 @@ config OF_UNITTEST that are executed once at boot time, and the results dumped to the console. - If unsure, say N here, but this option is safe to enable. + This option should only be enabled for a development kernel. The tests + will taint the kernel with TAINT_TEST. The tests will cause ERROR and + WARNING messages to print on the console. The tests will cause stack + traces to print on the console. It is possible that the tests will + leave the devicetree in a corrupted state. + + The unittest output will be verbose. Copy the output to a file + via capturing the console output or via the dmesg command. Process + this file with scripts/dtc/of_unittest_expect to reduce the + verbosity, test whether expected output is present, and to + summarize the results. + + If unsure, say N here. This option is not safe to enable. config OF_ALL_DTBS bool "Build all Device Tree Blobs" From 74df14cd301a1433947077e79ce2c610654a32e7 Mon Sep 17 00:00:00 2001 From: Frank Rowand Date: Mon, 13 Feb 2023 12:56:59 -0600 Subject: [PATCH 57/66] of: unittest: add node lifecycle tests Add tests to exercise the actions that occur when the reference count of devicetree nodes decrement to zero and beyond. Decrementing to zero triggers freeing memory allocated for the node. This commit will expose a pr_err() issue in of_node_release(), resulting in some kernal warnings and stack traces. When scripts/dtc/of_unittest_expect processes the console messages, it will also report related problems for EXPECT messages due to the pr_err() issue: ** missing EXPECT begin : 5 Signed-off-by: Frank Rowand Link: https://lore.kernel.org/r/20230213185702.395776-5-frowand.list@gmail.com [robh: Fix !CONFIG_OF_DYNAMIC build] Signed-off-by: Rob Herring --- drivers/of/dynamic.c | 14 +- .../of/unittest-data/testcases_common.dtsi | 1 + drivers/of/unittest-data/tests-lifecycle.dtsi | 8 + drivers/of/unittest.c | 150 +++++++++++++++++- 4 files changed, 170 insertions(+), 3 deletions(-) create mode 100644 drivers/of/unittest-data/tests-lifecycle.dtsi diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c index cd3821a6444f..becb80f762c8 100644 --- a/drivers/of/dynamic.c +++ b/drivers/of/dynamic.c @@ -332,7 +332,19 @@ void of_node_release(struct kobject *kobj) /* We should never be releasing nodes that haven't been detached. */ if (!of_node_check_flag(node, OF_DETACHED)) { pr_err("ERROR: Bad of_node_put() on %pOF\n", node); - dump_stack(); + + /* + * of unittests will test this path. Do not print the stack + * trace when the error is caused by unittest so that we do + * not display what a normal developer might reasonably + * consider a real bug. + */ + if (!IS_ENABLED(CONFIG_OF_UNITTEST) || + strcmp(node->parent->full_name, "testcase-data")) { + dump_stack(); + pr_err("ERROR: next of_node_put() on this node will result in a kboject warning 'refcount_t: underflow; use-after-free.'\n"); + } + return; } if (!of_node_check_flag(node, OF_DYNAMIC)) diff --git a/drivers/of/unittest-data/testcases_common.dtsi b/drivers/of/unittest-data/testcases_common.dtsi index 19292bbb4cbb..e7887f2301c1 100644 --- a/drivers/of/unittest-data/testcases_common.dtsi +++ b/drivers/of/unittest-data/testcases_common.dtsi @@ -17,3 +17,4 @@ #include "tests-address.dtsi" #include "tests-platform.dtsi" #include "tests-overlay.dtsi" +#include "tests-lifecycle.dtsi" diff --git a/drivers/of/unittest-data/tests-lifecycle.dtsi b/drivers/of/unittest-data/tests-lifecycle.dtsi new file mode 100644 index 000000000000..28509a8783a7 --- /dev/null +++ b/drivers/of/unittest-data/tests-lifecycle.dtsi @@ -0,0 +1,8 @@ +// SPDX-License-Identifier: GPL-2.0 + +/ { + testcase-data { + refcount-node { + }; + }; +}; diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c index bc0f1e50a4be..b5a7a31d8bd2 100644 --- a/drivers/of/unittest.c +++ b/drivers/of/unittest.c @@ -54,8 +54,9 @@ static struct unittest_results { * Print the expected message only if the current loglevel will allow * the actual message to print. * - * Do not use EXPECT_BEGIN() or EXPECT_END() for messages generated by - * pr_debug(). + * Do not use EXPECT_BEGIN(), EXPECT_END(), EXPECT_NOT_BEGIN(), or + * EXPECT_NOT_END() to report messages expected to be reported or not + * reported by pr_debug(). */ #define EXPECT_BEGIN(level, fmt, ...) \ printk(level pr_fmt("EXPECT \\ : ") fmt, ##__VA_ARGS__) @@ -63,6 +64,12 @@ static struct unittest_results { #define EXPECT_END(level, fmt, ...) \ printk(level pr_fmt("EXPECT / : ") fmt, ##__VA_ARGS__) +#define EXPECT_NOT_BEGIN(level, fmt, ...) \ + printk(level pr_fmt("EXPECT_NOT \\ : ") fmt, ##__VA_ARGS__) + +#define EXPECT_NOT_END(level, fmt, ...) \ + printk(level pr_fmt("EXPECT_NOT / : ") fmt, ##__VA_ARGS__) + static void __init of_unittest_find_node_by_name(void) { struct device_node *np; @@ -1488,6 +1495,7 @@ static int __init unittest_data_add(void) struct device_node *next = np->sibling; np->parent = of_root; + /* this will clear OF_DETACHED in np and children */ attach_node_and_children(np); np = next; } @@ -2998,6 +3006,143 @@ out: static inline void __init of_unittest_overlay(void) { } #endif +static void __init of_unittest_lifecycle(void) +{ +#ifdef CONFIG_OF_DYNAMIC + unsigned int refcount; + int found_refcount_one = 0; + int put_count = 0; + struct device_node *np; + struct device_node *prev_sibling, *next_sibling; + const char *refcount_path = "/testcase-data/refcount-node"; + const char *refcount_parent_path = "/testcase-data"; + + /* + * Node lifecycle tests, non-dynamic node: + * + * - Decrementing refcount to zero via of_node_put() should cause the + * attempt to free the node memory by of_node_release() to fail + * because the node is not a dynamic node. + * + * - Decrementing refcount past zero should result in additional + * errors reported. + */ + + np = of_find_node_by_path(refcount_path); + unittest(np, "find refcount_path \"%s\"\n", refcount_path); + if (np == NULL) + goto out_skip_tests; + + while (!found_refcount_one) { + + if (put_count++ > 10) { + unittest(0, "guardrail to avoid infinite loop\n"); + goto out_skip_tests; + } + + refcount = kref_read(&np->kobj.kref); + if (refcount == 1) + found_refcount_one = 1; + else + of_node_put(np); + } + + EXPECT_BEGIN(KERN_INFO, "OF: ERROR: of_node_release() detected bad of_node_put() on /testcase-data/refcount-node"); + + /* + * refcount is now one, decrementing to zero will result in a call to + * of_node_release() to free the node's memory, which should result + * in an error + */ + unittest(1, "/testcase-data/refcount-node is one"); + of_node_put(np); + + EXPECT_END(KERN_INFO, "OF: ERROR: of_node_release() detected bad of_node_put() on /testcase-data/refcount-node"); + + + /* + * expect stack trace for subsequent of_node_put(): + * __refcount_sub_and_test() calls: + * refcount_warn_saturate(r, REFCOUNT_SUB_UAF) + * + * Not capturing entire WARN_ONCE() trace with EXPECT_*(), just + * the first three lines, and the last line. + */ + EXPECT_BEGIN(KERN_INFO, "------------[ cut here ]------------"); + EXPECT_BEGIN(KERN_INFO, "WARNING: <>"); + EXPECT_BEGIN(KERN_INFO, "refcount_t: underflow; use-after-free."); + EXPECT_BEGIN(KERN_INFO, "---[ end trace <> ]---"); + + /* refcount is now zero, this should fail */ + unittest(1, "/testcase-data/refcount-node is zero"); + of_node_put(np); + + EXPECT_END(KERN_INFO, "---[ end trace <> ]---"); + EXPECT_END(KERN_INFO, "refcount_t: underflow; use-after-free."); + EXPECT_END(KERN_INFO, "WARNING: <>"); + EXPECT_END(KERN_INFO, "------------[ cut here ]------------"); + + /* + * Q. do we expect to get yet another warning? + * A. no, the WARNING is from WARN_ONCE() + */ + EXPECT_NOT_BEGIN(KERN_INFO, "------------[ cut here ]------------"); + EXPECT_NOT_BEGIN(KERN_INFO, "WARNING: <>"); + EXPECT_NOT_BEGIN(KERN_INFO, "refcount_t: underflow; use-after-free."); + EXPECT_NOT_BEGIN(KERN_INFO, "---[ end trace <> ]---"); + + unittest(1, "/testcase-data/refcount-node is zero, second time"); + of_node_put(np); + + EXPECT_NOT_END(KERN_INFO, "---[ end trace <> ]---"); + EXPECT_NOT_END(KERN_INFO, "refcount_t: underflow; use-after-free."); + EXPECT_NOT_END(KERN_INFO, "WARNING: <>"); + EXPECT_NOT_END(KERN_INFO, "------------[ cut here ]------------"); + + /* + * refcount of zero will trigger stack traces from any further + * attempt to of_node_get() node "refcount-node". One example of + * this is where of_unittest_check_node_linkage() will recursively + * scan the tree, with 'for_each_child_of_node()' doing an + * of_node_get() of the children of a node. + * + * Prevent the stack trace by removing node "refcount-node" from + * its parent's child list. + * + * WARNING: EVIL, EVIL, EVIL: + * + * Directly manipulate the child list of node /testcase-data to + * remove child refcount-node. This is ignoring all proper methods + * of removing a child and will leak a small amount of memory. + */ + + np = of_find_node_by_path(refcount_parent_path); + unittest(np, "find refcount_parent_path \"%s\"\n", refcount_parent_path); + unittest(np, "ERROR: devicetree live tree left in a 'bad state' if test fail\n"); + if (np == NULL) + return; + + prev_sibling = np->child; + next_sibling = prev_sibling->sibling; + if (!strcmp(prev_sibling->full_name, "refcount-node")) { + np->child = next_sibling; + next_sibling = next_sibling->sibling; + } + while (next_sibling) { + if (!strcmp(next_sibling->full_name, "refcount-node")) + prev_sibling->sibling = next_sibling->sibling; + prev_sibling = next_sibling; + next_sibling = next_sibling->sibling; + } + of_node_put(np); + + return; + +out_skip_tests: +#endif + unittest(0, "One or more lifecycle tests skipped\n"); +} + #ifdef CONFIG_OF_OVERLAY /* @@ -3502,6 +3647,7 @@ static int __init of_unittest(void) of_unittest_match_node(); of_unittest_platform_populate(); of_unittest_overlay(); + of_unittest_lifecycle(); /* Double check linkage after removing testcase data */ of_unittest_check_tree_linkage(); From 23522dd7033ad8dcd818f75469907a8fdac8e8a4 Mon Sep 17 00:00:00 2001 From: Frank Rowand Date: Mon, 13 Feb 2023 12:57:00 -0600 Subject: [PATCH 58/66] of: do not use "%pOF" printk format on node with refcount of zero of_node_release() can not use the "%pOF" printk format to report the node name of a node when the node reference count is zero. This is because the formatter device_node_string() calls fwnode_full_name_string() which indirectly calls of_node_get(). Calling of_node_get() on the node with a zero reference count results in a WARNING and stack trace. When the reference count has been decremented to zero, this function is in the subsequent call path which frees memory related to the node. This commit resolves the unittest EXPECT errors that were created in the previous commmit. Signed-off-by: Frank Rowand Link: https://lore.kernel.org/r/20230213185702.395776-6-frowand.list@gmail.com Signed-off-by: Rob Herring --- drivers/of/dynamic.c | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c index becb80f762c8..dbcbc41f3465 100644 --- a/drivers/of/dynamic.c +++ b/drivers/of/dynamic.c @@ -329,9 +329,17 @@ void of_node_release(struct kobject *kobj) { struct device_node *node = kobj_to_device_node(kobj); + /* + * can not use '"%pOF", node' in pr_err() calls from this function + * because an of_node_get(node) when refcount is already zero + * will result in an error and a stack dump + */ + /* We should never be releasing nodes that haven't been detached. */ if (!of_node_check_flag(node, OF_DETACHED)) { - pr_err("ERROR: Bad of_node_put() on %pOF\n", node); + + pr_err("ERROR: %s() detected bad of_node_put() on %pOF/%s\n", + __func__, node->parent, node->full_name); /* * of unittests will test this path. Do not print the stack From ec0b7e24d566a843e3cfba21a6471170fdb0f810 Mon Sep 17 00:00:00 2001 From: Frank Rowand Date: Mon, 13 Feb 2023 12:57:01 -0600 Subject: [PATCH 59/66] of: add consistency check to of_node_release() Add an additional consistency check to of_node_release(), which is called when the reference count of a devicetree node is decremented to zero. The node's children should have been deleted before the node is deleted so check that no children exist. Signed-off-by: Frank Rowand Link: https://lore.kernel.org/r/20230213185702.395776-7-frowand.list@gmail.com Signed-off-by: Rob Herring --- drivers/of/dynamic.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c index dbcbc41f3465..657a65006056 100644 --- a/drivers/of/dynamic.c +++ b/drivers/of/dynamic.c @@ -377,6 +377,10 @@ void of_node_release(struct kobject *kobj) __func__, node); } + if (node->child) + pr_err("ERROR: %s() unexpected children for %pOF/%s\n", + __func__, node->parent, node->full_name); + property_list_free(node->properties); property_list_free(node->deadprops); fwnode_links_purge(of_fwnode_handle(node)); From d9194e009efef9613f48022f3c885191c48120f9 Mon Sep 17 00:00:00 2001 From: Frank Rowand Date: Mon, 13 Feb 2023 12:57:02 -0600 Subject: [PATCH 60/66] of: dynamic: add lifecycle docbook info to node creation functions The existing docbook comments for the functions related to creating a devicetree node do not explain the reference count of a newly created node, how decrementing the reference count to zero will free the associated memory, and the caller's responsibility to call of_node_put() on the node. Explain what happens when the reference count is decremented to zero. Signed-off-by: Frank Rowand Link: https://lore.kernel.org/r/20230213185702.395776-8-frowand.list@gmail.com Signed-off-by: Rob Herring --- drivers/of/dynamic.c | 3 ++- include/linux/of.h | 11 +++++++++++ 2 files changed, 13 insertions(+), 1 deletion(-) diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c index 657a65006056..12aa99018969 100644 --- a/drivers/of/dynamic.c +++ b/drivers/of/dynamic.c @@ -443,7 +443,8 @@ struct property *__of_prop_dup(const struct property *prop, gfp_t allocflags) * another node. The node data are dynamically allocated and all the node * flags have the OF_DYNAMIC & OF_DETACHED bits set. * - * Return: The newly allocated node or NULL on out of memory error. + * Return: The newly allocated node or NULL on out of memory error. Use + * of_node_put() on it when done to free the memory allocated for it. */ struct device_node *__of_node_dup(const struct device_node *np, const char *full_name) diff --git a/include/linux/of.h b/include/linux/of.h index 37afd04f36eb..1cb659e682f5 100644 --- a/include/linux/of.h +++ b/include/linux/of.h @@ -100,6 +100,17 @@ struct of_reconfig_data { struct property *old_prop; }; +/** + * of_node_init - initialize a devicetree node + * @node: Pointer to device node that has been created by kzalloc() + * @phandle_name: Name of property holding a phandle value + * + * On return the device_node refcount is set to one. Use of_node_put() + * on @node when done to free the memory allocated for it. If the node + * is NOT a dynamic node the memory will not be freed. The decision of + * whether to free the memory will be done by node->release(), which is + * of_node_release(). + */ /* initialize a node */ extern const struct kobj_type of_node_ktype; extern const struct fwnode_operations of_fwnode_ops; From 65f81bbd9117cf2f2090998a1ff4345742678d26 Mon Sep 17 00:00:00 2001 From: Konrad Dybcio Date: Thu, 16 Feb 2023 12:08:02 +0100 Subject: [PATCH 61/66] dt-bindings: arm: Add Cortex-A715 and X3 Add compatibles for the Cortex-A715 and X3 cores found in some recent flagship designs. Signed-off-by: Konrad Dybcio Link: https://lore.kernel.org/r/20230216110803.3945747-1-konrad.dybcio@linaro.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/arm/cpus.yaml | 2 ++ 1 file changed, 2 insertions(+) diff --git a/Documentation/devicetree/bindings/arm/cpus.yaml b/Documentation/devicetree/bindings/arm/cpus.yaml index 01b5a9c689a2..0e6b182c8a90 100644 --- a/Documentation/devicetree/bindings/arm/cpus.yaml +++ b/Documentation/devicetree/bindings/arm/cpus.yaml @@ -141,6 +141,7 @@ properties: - arm,cortex-a78ae - arm,cortex-a510 - arm,cortex-a710 + - arm,cortex-a715 - arm,cortex-m0 - arm,cortex-m0+ - arm,cortex-m1 @@ -151,6 +152,7 @@ properties: - arm,cortex-r7 - arm,cortex-x1 - arm,cortex-x2 + - arm,cortex-x3 - arm,neoverse-e1 - arm,neoverse-n1 - arm,neoverse-n2 From 0305c98c9e1595bf4e8b3597a65ace9de98f0b5f Mon Sep 17 00:00:00 2001 From: Keguang Zhang Date: Tue, 21 Feb 2023 18:25:45 +0800 Subject: [PATCH 62/66] dt-bindings: interrupt-controller: convert loongson,ls1x-intc.txt to json-schema Convert the Loongson1 interrupt controller dt-bindings to json-schema. Signed-off-by: Keguang Zhang Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20230221102545.2103632-1-keguang.zhang@gmail.com Signed-off-by: Rob Herring --- .../loongson,ls1x-intc.txt | 24 --------- .../loongson,ls1x-intc.yaml | 51 +++++++++++++++++++ 2 files changed, 51 insertions(+), 24 deletions(-) delete mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt deleted file mode 100644 index a63ed9fcb535..000000000000 --- a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.txt +++ /dev/null @@ -1,24 +0,0 @@ -Loongson ls1x Interrupt Controller - -Required properties: - -- compatible : should be "loongson,ls1x-intc". Valid strings are: - -- reg : Specifies base physical address and size of the registers. -- interrupt-controller : Identifies the node as an interrupt controller -- #interrupt-cells : Specifies the number of cells needed to encode an - interrupt source. The value shall be 2. -- interrupts : Specifies the CPU interrupt the controller is connected to. - -Example: - -intc: interrupt-controller@1fd01040 { - compatible = "loongson,ls1x-intc"; - reg = <0x1fd01040 0x18>; - - interrupt-controller; - #interrupt-cells = <2>; - - interrupt-parent = <&cpu_intc>; - interrupts = <2>; -}; diff --git a/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml new file mode 100644 index 000000000000..c60125fb1cbf --- /dev/null +++ b/Documentation/devicetree/bindings/interrupt-controller/loongson,ls1x-intc.yaml @@ -0,0 +1,51 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/interrupt-controller/loongson,ls1x-intc.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Loongson-1 Interrupt Controller + +maintainers: + - Keguang Zhang + +description: + Loongson-1 interrupt controller is connected to the MIPS core interrupt + controller, which controls several groups of interrupts. + +properties: + compatible: + const: loongson,ls1x-intc + + reg: + maxItems: 1 + + interrupt-controller: true + + '#interrupt-cells': + const: 2 + + interrupts: + maxItems: 1 + +required: + - compatible + - reg + - interrupt-controller + - '#interrupt-cells' + - interrupts + +additionalProperties: false + +examples: + - | + intc0: interrupt-controller@1fd01040 { + compatible = "loongson,ls1x-intc"; + reg = <0x1fd01040 0x18>; + + interrupt-controller; + #interrupt-cells = <2>; + + interrupt-parent = <&cpu_intc>; + interrupts = <2>; + }; From 64d666a7bd85c6208bb7f6700b426ac8943a7fa3 Mon Sep 17 00:00:00 2001 From: Mukesh Ojha Date: Tue, 21 Feb 2023 19:06:55 +0530 Subject: [PATCH 63/66] dt-bindings: sram: qcom,imem: document sm8450 Add compatible for sm8450 IMEM. Signed-off-by: Mukesh Ojha Acked-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/1676986616-21378-1-git-send-email-quic_mojha@quicinc.com Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 + 1 file changed, 1 insertion(+) diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index 665c06e14f79..ba694ce4a037 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -26,6 +26,7 @@ properties: - qcom,sdm845-imem - qcom,sdx55-imem - qcom,sdx65-imem + - qcom,sm8450-imem - const: syscon - const: simple-mfd From fb4b06f521c1cdf04088151ed587c188862e3111 Mon Sep 17 00:00:00 2001 From: Conor Dooley Date: Fri, 17 Feb 2023 18:00:36 +0000 Subject: [PATCH 64/66] dt-bindings: drop Sagar Kadam from SiFive binding maintainership Sagar's email listed in maintainers is bouncing as his division was sold off by the company. I attempted to contact him some days ago on what the bounce email told me was his new contact information, but am yet to receive a response. Paul and Palmer are listed on each of the bindings, both of whom were alive & well as of Wednesday so the bindings remain maintained. CC: Sagar Kadam CC: Sagar Kadam Link: https://lore.kernel.org/all/785425ca-4000-a7e4-16d6-4d68c91b158d@kernel.org/ Signed-off-by: Conor Dooley Acked-by: Palmer Dabbelt Link: https://lore.kernel.org/r/20230217180035.39658-1-conor@kernel.org Signed-off-by: Rob Herring --- Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml | 1 - .../bindings/interrupt-controller/sifive,plic-1.0.0.yaml | 1 - Documentation/devicetree/bindings/pwm/pwm-sifive.yaml | 1 - Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml | 3 +-- 4 files changed, 1 insertion(+), 5 deletions(-) diff --git a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml index c3be1b600007..c79e752283aa 100644 --- a/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml +++ b/Documentation/devicetree/bindings/clock/sifive/fu540-prci.yaml @@ -8,7 +8,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: SiFive FU540 Power Reset Clock Interrupt Controller (PRCI) maintainers: - - Sagar Kadam - Paul Walmsley description: diff --git a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml index 99e01f4d0a69..63bc89e13480 100644 --- a/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml +++ b/Documentation/devicetree/bindings/interrupt-controller/sifive,plic-1.0.0.yaml @@ -45,7 +45,6 @@ description: from S-mode. So add thead,c900-plic to distinguish them. maintainers: - - Sagar Kadam - Paul Walmsley - Palmer Dabbelt diff --git a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml index 605c1766dba8..bae993128981 100644 --- a/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml +++ b/Documentation/devicetree/bindings/pwm/pwm-sifive.yaml @@ -8,7 +8,6 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: SiFive PWM controller maintainers: - - Sagar Kadam - Paul Walmsley description: diff --git a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml index bf3f07421f7e..0551a0d1b3df 100644 --- a/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml +++ b/Documentation/devicetree/bindings/riscv/sifive,ccache0.yaml @@ -8,8 +8,7 @@ $schema: http://devicetree.org/meta-schemas/core.yaml# title: SiFive Composable Cache Controller maintainers: - - Sagar Kadam - - Paul Walmsley + - Paul Walmsley description: The SiFive Composable Cache Controller is used to provide access to fast copies From b4858dc61647e5439cbba79022bfc87328c1fb84 Mon Sep 17 00:00:00 2001 From: Colin Ian King Date: Mon, 20 Feb 2023 14:44:22 +0000 Subject: [PATCH 65/66] of: dynamic: Fix spelling mistake "kojbect" -> "kobject" There is a spelling mistake in a pr_err message. Fix it. Signed-off-by: Colin Ian King Reviewed-by: Frank Rowand Link: https://lore.kernel.org/r/20230220144422.873356-1-colin.i.king@gmail.com Signed-off-by: Rob Herring --- drivers/of/dynamic.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/of/dynamic.c b/drivers/of/dynamic.c index 12aa99018969..07d93753b12f 100644 --- a/drivers/of/dynamic.c +++ b/drivers/of/dynamic.c @@ -350,7 +350,7 @@ void of_node_release(struct kobject *kobj) if (!IS_ENABLED(CONFIG_OF_UNITTEST) || strcmp(node->parent->full_name, "testcase-data")) { dump_stack(); - pr_err("ERROR: next of_node_put() on this node will result in a kboject warning 'refcount_t: underflow; use-after-free.'\n"); + pr_err("ERROR: next of_node_put() on this node will result in a kobject warning 'refcount_t: underflow; use-after-free.'\n"); } return; From 1ba7dfb905b3975bdb8b9d1f7793efcdfc59385b Mon Sep 17 00:00:00 2001 From: Saravanan Sekar Date: Wed, 7 Dec 2022 18:37:14 +0100 Subject: [PATCH 66/66] dt-bindings: regulator: Add mps,mpq7932 power-management IC Document mpq7932 power-management IC Signed-off-by: Saravanan Sekar Acked-by: Guenter Roeck Reviewed-by: Krzysztof Kozlowski Link: https://lore.kernel.org/r/20221207173716.123223-3-saravanan@linumiz.com Signed-off-by: Rob Herring --- .../bindings/regulator/mps,mpq7932.yaml | 68 +++++++++++++++++++ 1 file changed, 68 insertions(+) create mode 100644 Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml diff --git a/Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml b/Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml new file mode 100644 index 000000000000..2185cd011c46 --- /dev/null +++ b/Documentation/devicetree/bindings/regulator/mps,mpq7932.yaml @@ -0,0 +1,68 @@ +# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/regulator/mps,mpq7932.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Monolithic Power System MPQ7932 PMIC + +maintainers: + - Saravanan Sekar + +properties: + compatible: + enum: + - mps,mpq7932 + + reg: + maxItems: 1 + + regulators: + type: object + description: | + list of regulators provided by this controller, must be named + after their hardware counterparts BUCK[1-6] + + patternProperties: + "^buck[1-6]$": + type: object + $ref: regulator.yaml# + unevaluatedProperties: false + + additionalProperties: false + +required: + - compatible + - reg + - regulators + +additionalProperties: false + +examples: + - | + i2c { + #address-cells = <1>; + #size-cells = <0>; + + pmic@3 { + compatible = "mps,mpq7932"; + reg = <0x3>; + + regulators { + buck1 { + regulator-name = "buck1"; + regulator-min-microvolt = <1600000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + + buck2 { + regulator-name = "buck2"; + regulator-min-microvolt = <1700000>; + regulator-max-microvolt = <1800000>; + regulator-boot-on; + }; + }; + }; + }; +...