ARM: davinci: dm646x evm: wrong register used in setup_vpif_input_channel_mode
The function setup_vpif_input_channel_mode() used the VSCLKDIS register instead of VIDCLKCTL. This meant that when in HD mode videoport channel 0 used a different clock from channel 1. Clearly a copy-and-paste error. Signed-off-by: Hans Verkuil <hans.verkuil@cisco.com> Acked-by: Manjunath Hadli <manjunath.hadli@ti.com> Signed-off-by: Sekhar Nori <nsekhar@ti.com> Cc: stable@kernel.org
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@ -564,7 +564,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
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int val;
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u32 value;
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if (!vpif_vsclkdis_reg || !cpld_client)
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if (!vpif_vidclkctl_reg || !cpld_client)
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return -ENXIO;
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val = i2c_smbus_read_byte(cpld_client);
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@ -572,7 +572,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
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return val;
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spin_lock_irqsave(&vpif_reg_lock, flags);
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value = __raw_readl(vpif_vsclkdis_reg);
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value = __raw_readl(vpif_vidclkctl_reg);
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if (mux_mode) {
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val &= VPIF_INPUT_TWO_CHANNEL;
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value |= VIDCH1CLK;
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@ -580,7 +580,7 @@ static int setup_vpif_input_channel_mode(int mux_mode)
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val |= VPIF_INPUT_ONE_CHANNEL;
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value &= ~VIDCH1CLK;
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}
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__raw_writel(value, vpif_vsclkdis_reg);
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__raw_writel(value, vpif_vidclkctl_reg);
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spin_unlock_irqrestore(&vpif_reg_lock, flags);
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err = i2c_smbus_write_byte(cpld_client, val);
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