EDAC/mc: Add new HBM2 memory type
commite1ca90b7cc
upstream. Add a new entry to 'enum mem_type' and a new string to 'edac_mem_types[]' for HBM2 (High Bandwidth Memory Gen 2) new memory type. Intel-SIG: commite1ca90b7cc
EDAC/mc: Add new HBM2 memory type. Backport to add EDAC HBM support. Reviewed-by: Yazen Ghannam <yazen.ghannam@amd.com> Signed-off-by: Muralidhara M K <muralimk@amd.com> Signed-off-by: Naveen Krishna Chatradhi <nchatrad@amd.com> Signed-off-by: Tony Luck <tony.luck@intel.com> Link: https://lore.kernel.org/r/20210630152828.162659-4-nchatrad@amd.com [ Youquan Song: amend commit log ] Signed-off-by: Youquan Song <youquan.song@intel.com>
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@ -216,6 +216,7 @@ const char * const edac_mem_types[] = {
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[MEM_LRDDR4] = "Load-Reduced-DDR4-RAM",
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[MEM_DDR5] = "Unbuffered-DDR5",
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[MEM_NVDIMM] = "Non-volatile-RAM",
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[MEM_HBM2] = "High-bandwidth-memory-Gen2",
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};
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EXPORT_SYMBOL_GPL(edac_mem_types);
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@ -189,6 +189,7 @@ static inline char *mc_event_error_type(const unsigned int err_type)
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* @MEM_LRDDR4: Load-Reduced DDR4 memory.
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* @MEM_DDR5: Unbuffered DDR5 RAM
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* @MEM_NVDIMM: Non-volatile RAM
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* @MEM_HBM2: High bandwidth Memory Gen 2.
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*/
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enum mem_type {
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MEM_EMPTY = 0,
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@ -214,6 +215,7 @@ enum mem_type {
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MEM_LRDDR4,
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MEM_DDR5,
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MEM_NVDIMM,
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MEM_HBM2,
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};
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#define MEM_FLAG_EMPTY BIT(MEM_EMPTY)
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@ -238,6 +240,7 @@ enum mem_type {
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#define MEM_FLAG_LRDDR4 BIT(MEM_LRDDR4)
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#define MEM_FLAG_DDR5 BIT(MEM_DDR5)
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#define MEM_FLAG_NVDIMM BIT(MEM_NVDIMM)
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#define MEM_FLAG_HBM2 BIT(MEM_HBM2)
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/**
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* enum edac-type - Error Detection and Correction capabilities and mode
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