KVM: SEV-ES: Delegate LBR virtualization to the processor
[ Upstream commit b7e4be0a224fe5c6be30c1c8bdda8d2317ad6ba4 ]
As documented in APM[1], LBR Virtualization must be enabled for SEV-ES
guests. Although KVM currently enforces LBRV for SEV-ES guests, there
are multiple issues with it:
o MSR_IA32_DEBUGCTLMSR is still intercepted. Since MSR_IA32_DEBUGCTLMSR
interception is used to dynamically toggle LBRV for performance reasons,
this can be fatal for SEV-ES guests. For ex SEV-ES guest on Zen3:
[guest ~]# wrmsr 0x1d9 0x4
KVM: entry failed, hardware error 0xffffffff
EAX=00000004 EBX=00000000 ECX=000001d9 EDX=00000000
Fix this by never intercepting MSR_IA32_DEBUGCTLMSR for SEV-ES guests.
No additional save/restore logic is required since MSR_IA32_DEBUGCTLMSR
is of swap type A.
o KVM will disable LBRV if userspace sets MSR_IA32_DEBUGCTLMSR before the
VMSA is encrypted. Fix this by moving LBRV enablement code post VMSA
encryption.
[1]: AMD64 Architecture Programmer's Manual Pub. 40332, Rev. 4.07 - June
2023, Vol 2, 15.35.2 Enabling SEV-ES.
https://bugzilla.kernel.org/attachment.cgi?id=304653
Fixes: 376c6d2850
("KVM: SVM: Provide support for SEV-ES vCPU creation/loading")
Co-developed-by: Nikunj A Dadhania <nikunj@amd.com>
Signed-off-by: Nikunj A Dadhania <nikunj@amd.com>
Signed-off-by: Ravi Bangoria <ravi.bangoria@amd.com>
Message-ID: <20240531044644.768-4-ravi.bangoria@amd.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -664,6 +664,14 @@ static int __sev_launch_update_vmsa(struct kvm *kvm, struct kvm_vcpu *vcpu,
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return ret;
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vcpu->arch.guest_state_protected = true;
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/*
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* SEV-ES guest mandates LBR Virtualization to be _always_ ON. Enable it
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* only after setting guest_state_protected because KVM_SET_MSRS allows
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* dynamic toggling of LBRV (for performance reason) on write access to
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* MSR_IA32_DEBUGCTLMSR when guest_state_protected is not set.
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*/
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svm_enable_lbrv(vcpu);
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return 0;
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}
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@ -3035,7 +3043,6 @@ static void sev_es_init_vmcb(struct vcpu_svm *svm)
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struct kvm_vcpu *vcpu = &svm->vcpu;
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svm->vmcb->control.nested_ctl |= SVM_NESTED_CTL_SEV_ES_ENABLE;
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svm->vmcb->control.virt_ext |= LBR_CTL_ENABLE_MASK;
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/*
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* An SEV-ES guest requires a VMSA area that is a separate from the
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@ -3087,10 +3094,6 @@ static void sev_es_init_vmcb(struct vcpu_svm *svm)
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/* Clear intercepts on selected MSRs */
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set_msr_interception(vcpu, svm->msrpm, MSR_EFER, 1, 1);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_CR_PAT, 1, 1);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHFROMIP, 1, 1);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 1, 1);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1);
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}
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void sev_init_vmcb(struct vcpu_svm *svm)
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@ -99,6 +99,7 @@ static const struct svm_direct_access_msrs {
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{ .index = MSR_IA32_SPEC_CTRL, .always = false },
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{ .index = MSR_IA32_PRED_CMD, .always = false },
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{ .index = MSR_IA32_FLUSH_CMD, .always = false },
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{ .index = MSR_IA32_DEBUGCTLMSR, .always = false },
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{ .index = MSR_IA32_LASTBRANCHFROMIP, .always = false },
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{ .index = MSR_IA32_LASTBRANCHTOIP, .always = false },
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{ .index = MSR_IA32_LASTINTFROMIP, .always = false },
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@ -1008,7 +1009,7 @@ void svm_copy_lbrs(struct vmcb *to_vmcb, struct vmcb *from_vmcb)
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vmcb_mark_dirty(to_vmcb, VMCB_LBR);
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}
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static void svm_enable_lbrv(struct kvm_vcpu *vcpu)
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void svm_enable_lbrv(struct kvm_vcpu *vcpu)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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@ -1018,6 +1019,9 @@ static void svm_enable_lbrv(struct kvm_vcpu *vcpu)
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTFROMIP, 1, 1);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTINTTOIP, 1, 1);
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if (sev_es_guest(vcpu->kvm))
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_DEBUGCTLMSR, 1, 1);
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/* Move the LBR msrs to the vmcb02 so that the guest can see them. */
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if (is_guest_mode(vcpu))
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svm_copy_lbrs(svm->vmcb, svm->vmcb01.ptr);
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@ -1027,6 +1031,8 @@ static void svm_disable_lbrv(struct kvm_vcpu *vcpu)
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{
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struct vcpu_svm *svm = to_svm(vcpu);
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KVM_BUG_ON(sev_es_guest(vcpu->kvm), vcpu->kvm);
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svm->vmcb->control.virt_ext &= ~LBR_CTL_ENABLE_MASK;
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHFROMIP, 0, 0);
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set_msr_interception(vcpu, svm->msrpm, MSR_IA32_LASTBRANCHTOIP, 0, 0);
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@ -30,7 +30,7 @@
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#define IOPM_SIZE PAGE_SIZE * 3
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#define MSRPM_SIZE PAGE_SIZE * 2
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#define MAX_DIRECT_ACCESS_MSRS 47
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#define MAX_DIRECT_ACCESS_MSRS 48
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#define MSRPM_OFFSETS 32
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extern u32 msrpm_offsets[MSRPM_OFFSETS] __read_mostly;
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extern bool npt_enabled;
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@ -542,6 +542,7 @@ u32 *svm_vcpu_alloc_msrpm(void);
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void svm_vcpu_init_msrpm(struct kvm_vcpu *vcpu, u32 *msrpm);
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void svm_vcpu_free_msrpm(u32 *msrpm);
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void svm_copy_lbrs(struct vmcb *to_vmcb, struct vmcb *from_vmcb);
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void svm_enable_lbrv(struct kvm_vcpu *vcpu);
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void svm_update_lbrv(struct kvm_vcpu *vcpu);
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int svm_set_efer(struct kvm_vcpu *vcpu, u64 efer);
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