New rk3288 features are Gamma support for the VOPs as well as declaring
the cpuid found in the efuses. Veyron display got a cleanup to use the interpolated backlight values instead of declaring huge tables and finally a cleanup fixing some tabs/spaces issues in the dts files. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAl2tnOcQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgW+GCACYHiRGotnJibFu4gCerBoISP13qzqQnpYR VSYnR84pD/cOzDas8PKOkPUg9+Db5fsDN1NPAp/S0vyirye5jgjQFlWNK7+o04Qr JnLJYv1OlhkRiipuTJesiMo4mIOpiJWvliU050pmfzTJihZwBocw9FUqllq/V14A WwNhcGIhZxEB+GkKkpFj7PZXSkTQy3PwmWZEAL2C9U2qHL4Vszlmo1P0AAx9af0S 8FCY1OhVSZ/C732k/aijmg7tm70uBwKeBz1Kn/Rh/AiI34yzUufxnPojQstlLkRt pJnTypt0nc/1Gxt16So/4HjTfuIdT2pK6Q9t71VNbQl/3ogKE2Oj =r5X+ -----END PGP SIGNATURE----- Merge tag 'v5.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt New rk3288 features are Gamma support for the VOPs as well as declaring the cpuid found in the efuses. Veyron display got a cleanup to use the interpolated backlight values instead of declaring huge tables and finally a cleanup fixing some tabs/spaces issues in the dts files. * tag 'v5.5-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: remove some tabs and spaces from dtsi files ARM: dts: rockchip: Add RK3288 VOP gamma LUT address ARM: dts: rockchip: Use interpolated brightness tables for veyron ARM: dts: rockchip: Add cpu id to rk3288 efuse node Link: https://lore.kernel.org/r/1770986.Em1ahGqaF7@phil Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
832e1173c0
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@ -696,8 +696,8 @@
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hdmi {
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hdmi_ctl: hdmi-ctl {
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rockchip,pins = <1 RK_PB0 1 &pcfg_pull_none>,
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<1 RK_PB1 1 &pcfg_pull_none>,
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rockchip,pins = <1 RK_PB0 1 &pcfg_pull_none>,
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<1 RK_PB1 1 &pcfg_pull_none>,
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<1 RK_PB2 1 &pcfg_pull_none>,
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<1 RK_PB3 1 &pcfg_pull_none>;
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};
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@ -230,14 +230,14 @@
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};
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emmc {
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emmc_reset: emmc-reset {
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rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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emmc_reset: emmc-reset {
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rockchip,pins = <3 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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gmac {
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phy_rst: phy-rst {
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
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rockchip,pins = <4 RK_PB0 RK_FUNC_GPIO &pcfg_output_high>;
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};
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};
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};
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@ -382,18 +382,15 @@
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pmic {
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pmic_int: pmic-int {
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rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO \
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&pcfg_pull_up>;
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rockchip,pins = <0 RK_PA4 RK_FUNC_GPIO &pcfg_pull_up>;
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};
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dvs_1: dvs-1 {
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rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO \
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&pcfg_pull_down>;
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rockchip,pins = <0 RK_PB3 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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dvs_2: dvs-2 {
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rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO \
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&pcfg_pull_down>;
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rockchip,pins = <0 RK_PB4 RK_FUNC_GPIO &pcfg_pull_down>;
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};
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};
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@ -406,8 +403,7 @@
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};
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sdmmc_clk: sdmmc-clk {
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rockchip,pins = <6 RK_PC4 1 \
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&pcfg_pull_none_drv_8ma>;
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rockchip,pins = <6 RK_PC4 1 &pcfg_pull_none_drv_8ma>;
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};
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sdmmc_cmd: sdmmc-cmd {
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@ -432,7 +428,7 @@
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sdio {
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wifi_enable: wifi-enable {
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rockchip,pins = <4 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>,
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<4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
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<4 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>;
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};
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};
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};
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@ -41,39 +41,8 @@
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backlight: backlight {
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compatible = "pwm-backlight";
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brightness-levels = <
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0 1 2 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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brightness-levels = <0 255>;
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num-interpolated-steps = <255>;
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default-brightness-level = <128>;
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enable-gpios = <&gpio7 RK_PA2 GPIO_ACTIVE_HIGH>;
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pinctrl-names = "default";
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@ -20,39 +20,8 @@
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&backlight {
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/* Jaq panel PWM must be >= 3%, so start non-zero brightness at 8 */
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brightness-levels = <
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0
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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brightness-levels = <0 8 255>;
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num-interpolated-steps = <247>;
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};
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&rk808 {
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@ -38,39 +38,8 @@
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&backlight {
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/* Minnie panel PWM must be >= 1%, so start non-zero brightness at 3 */
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brightness-levels = <
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0 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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brightness-levels = <0 3 255>;
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num-interpolated-steps = <252>;
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};
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&i2c_tunnel {
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&backlight {
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/* Tiger panel PWM must be >= 1%, so start non-zero brightness at 3 */
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brightness-levels = <
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0 3 4 5 6 7
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8 9 10 11 12 13 14 15
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16 17 18 19 20 21 22 23
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24 25 26 27 28 29 30 31
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32 33 34 35 36 37 38 39
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40 41 42 43 44 45 46 47
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48 49 50 51 52 53 54 55
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56 57 58 59 60 61 62 63
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64 65 66 67 68 69 70 71
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72 73 74 75 76 77 78 79
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80 81 82 83 84 85 86 87
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88 89 90 91 92 93 94 95
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96 97 98 99 100 101 102 103
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104 105 106 107 108 109 110 111
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112 113 114 115 116 117 118 119
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120 121 122 123 124 125 126 127
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128 129 130 131 132 133 134 135
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136 137 138 139 140 141 142 143
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144 145 146 147 148 149 150 151
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152 153 154 155 156 157 158 159
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160 161 162 163 164 165 166 167
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168 169 170 171 172 173 174 175
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176 177 178 179 180 181 182 183
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184 185 186 187 188 189 190 191
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192 193 194 195 196 197 198 199
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200 201 202 203 204 205 206 207
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208 209 210 211 212 213 214 215
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216 217 218 219 220 221 222 223
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224 225 226 227 228 229 230 231
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232 233 234 235 236 237 238 239
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240 241 242 243 244 245 246 247
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248 249 250 251 252 253 254 255>;
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brightness-levels = <0 3 255>;
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num-interpolated-steps = <252>;
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};
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&backlight_regulator {
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@ -1023,7 +1023,7 @@
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vopb: vop@ff930000 {
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compatible = "rockchip,rk3288-vop";
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reg = <0x0 0xff930000 0x0 0x19c>;
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reg = <0x0 0xff930000 0x0 0x19c>, <0x0 0xff931000 0x0 0x1000>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru ACLK_VOP0>, <&cru DCLK_VOP0>, <&cru HCLK_VOP0>;
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clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
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@ -1073,7 +1073,7 @@
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vopl: vop@ff940000 {
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compatible = "rockchip,rk3288-vop";
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reg = <0x0 0xff940000 0x0 0x19c>;
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reg = <0x0 0xff940000 0x0 0x19c>, <0x0 0xff941000 0x0 0x1000>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru ACLK_VOP1>, <&cru DCLK_VOP1>, <&cru HCLK_VOP1>;
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clock-names = "aclk_vop", "dclk_vop", "hclk_vop";
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@ -1391,6 +1391,9 @@
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clocks = <&cru PCLK_EFUSE256>;
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clock-names = "pclk_efuse";
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cpu_id: cpu-id@7 {
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reg = <0x07 0x10>;
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};
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cpu_leakage: cpu_leakage@17 {
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reg = <0x17 0x1>;
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};
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Loading…
Reference in New Issue