MX51: Add support for usb host 2
Signed-off-by: Arnaud Patard <arnaud.patard@rtp-net.org> Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
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08406f540c
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@ -97,6 +97,29 @@ struct platform_device mxc_usbh1_device = {
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},
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};
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static struct resource usbh2_resources[] = {
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{
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.start = MX51_OTG_BASE_ADDR + 0x400,
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.end = MX51_OTG_BASE_ADDR + 0x400 + 0x1ff,
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.flags = IORESOURCE_MEM,
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},
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{
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.start = MX51_MXC_INT_USB_H2,
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.flags = IORESOURCE_IRQ,
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},
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};
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struct platform_device mxc_usbh2_device = {
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.name = "mxc-ehci",
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.id = 2,
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.num_resources = ARRAY_SIZE(usbh2_resources),
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.resource = usbh2_resources,
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.dev = {
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.dma_mask = &usb_dma_mask,
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.coherent_dma_mask = DMA_BIT_MASK(32),
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},
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};
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static struct resource mxc_kpp_resources[] = {
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{
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.start = MX51_MXC_INT_KPP,
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@ -1,5 +1,6 @@
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extern struct platform_device mxc_usbdr_host_device;
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extern struct platform_device mxc_usbh1_device;
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extern struct platform_device mxc_usbh2_device;
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extern struct platform_device mxc_usbdr_udc_device;
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extern struct platform_device mxc_hsi2c_device;
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extern struct platform_device mxc_keypad_device;
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@ -49,6 +49,7 @@
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#define MXC_OTG_OFFSET 0
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#define MXC_H1_OFFSET 0x200
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#define MXC_H2_OFFSET 0x400
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/* USB_CTRL */
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#define MXC_OTG_UCTRL_OWIE_BIT (1 << 27) /* OTG wakeup intr enable */
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@ -61,6 +62,11 @@
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#define MXC_OTG_PHYCTRL_OC_DIS_BIT (1 << 8) /* OTG Disable Overcurrent Event */
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#define MXC_H1_OC_DIS_BIT (1 << 5) /* UH1 Disable Overcurrent Event */
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/* USBH2CTRL */
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#define MXC_H2_UCTRL_H2UIE_BIT (1 << 8)
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#define MXC_H2_UCTRL_H2WIE_BIT (1 << 7)
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#define MXC_H2_UCTRL_H2PM_BIT (1 << 4)
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#define MXC_USBCMD_OFFSET 0x140
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/* USBCMD */
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@ -266,6 +272,9 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
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case 1: /* Host 1 port */
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usbotg_base = usb_base + MXC_H1_OFFSET;
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break;
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case 2: /* Host 2 port */
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usbotg_base = usb_base + MXC_H2_OFFSET;
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break;
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default:
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printk(KERN_ERR"%s no such port %d\n", __func__, port);
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ret = -ENOENT;
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@ -329,6 +338,22 @@ int mxc_initialize_usb_hw(int port, unsigned int flags)
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v &= MXC_UCMD_ITC_NO_THRESHOLD_MASK;
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__raw_writel(v, usbotg_base + MXC_USBCMD_OFFSET);
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break;
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case 2: /* Host 2 ULPI */
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v = __raw_readl(usbother_base + MXC_USBH2CTRL_OFFSET);
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if (flags & MXC_EHCI_WAKEUP_ENABLED) {
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/* HOST1 wakeup/ULPI intr enable */
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v |= (MXC_H2_UCTRL_H2WIE_BIT | MXC_H2_UCTRL_H2UIE_BIT);
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} else {
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/* HOST1 wakeup/ULPI intr disable */
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v &= ~(MXC_H2_UCTRL_H2WIE_BIT | MXC_H2_UCTRL_H2UIE_BIT);
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}
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if (flags & MXC_EHCI_POWER_PINS_ENABLED)
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v &= ~MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask used*/
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else
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v |= MXC_H2_UCTRL_H2PM_BIT; /* HOST2 power mask used*/
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__raw_writel(v, usbother_base + MXC_USBH2CTRL_OFFSET);
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break;
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}
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error:
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@ -31,6 +31,7 @@
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#define MXC_USBCTRL_OFFSET 0
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#define MXC_USB_PHY_CTR_FUNC_OFFSET 0x8
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#define MXC_USB_PHY_CTR_FUNC2_OFFSET 0xc
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#define MXC_USBH2CTRL_OFFSET 0x14
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#define MX5_USBOTHER_REGS_OFFSET 0x800
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