drm/amdgpu: Add first_non_cp and last_non_cp in amdgpu_doorbell_index
They will be used to inform KFD the doorbell range not usable for CP. Signed-off-by: Yong Zhao <Yong.Zhao@amd.com> Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -69,6 +69,8 @@ struct amdgpu_doorbell_index {
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uint32_t vce_ring6_7;
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} uvd_vce;
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};
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uint32_t first_non_cp;
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uint32_t last_non_cp;
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uint32_t max_assignment;
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/* Per engine SDMA doorbell size in dword */
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uint32_t sdma_doorbell_range;
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@ -139,6 +141,10 @@ typedef enum _AMDGPU_VEGA20_DOORBELL_ASSIGNMENT
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AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3 = 0x18D,
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AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5 = 0x18E,
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AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7 = 0x18F,
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AMDGPU_VEGA20_DOORBELL64_FIRST_NON_CP = AMDGPU_VEGA20_DOORBELL_sDMA_ENGINE0,
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AMDGPU_VEGA20_DOORBELL64_LAST_NON_CP = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7,
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AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT = 0x18F,
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AMDGPU_VEGA20_DOORBELL_INVALID = 0xFFFF
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} AMDGPU_VEGA20_DOORBELL_ASSIGNMENT;
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@ -214,6 +220,9 @@ typedef enum _AMDGPU_DOORBELL64_ASSIGNMENT
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AMDGPU_DOORBELL64_VCE_RING4_5 = 0xFE,
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AMDGPU_DOORBELL64_VCE_RING6_7 = 0xFF,
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AMDGPU_DOORBELL64_FIRST_NON_CP = AMDGPU_DOORBELL64_sDMA_ENGINE0,
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AMDGPU_DOORBELL64_LAST_NON_CP = AMDGPU_DOORBELL64_VCE_RING6_7,
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AMDGPU_DOORBELL64_MAX_ASSIGNMENT = 0xFF,
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AMDGPU_DOORBELL64_INVALID = 0xFFFF
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} AMDGPU_DOORBELL64_ASSIGNMENT;
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@ -79,6 +79,10 @@ void vega10_doorbell_index_init(struct amdgpu_device *adev)
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adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_DOORBELL64_VCE_RING2_3;
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adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_DOORBELL64_VCE_RING4_5;
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adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_DOORBELL64_VCE_RING6_7;
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adev->doorbell_index.first_non_cp = AMDGPU_DOORBELL64_FIRST_NON_CP;
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adev->doorbell_index.last_non_cp = AMDGPU_DOORBELL64_LAST_NON_CP;
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/* In unit of dword doorbell */
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adev->doorbell_index.max_assignment = AMDGPU_DOORBELL64_MAX_ASSIGNMENT << 1;
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adev->doorbell_index.sdma_doorbell_range = 4;
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@ -83,6 +83,10 @@ void vega20_doorbell_index_init(struct amdgpu_device *adev)
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adev->doorbell_index.uvd_vce.vce_ring2_3 = AMDGPU_VEGA20_DOORBELL64_VCE_RING2_3;
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adev->doorbell_index.uvd_vce.vce_ring4_5 = AMDGPU_VEGA20_DOORBELL64_VCE_RING4_5;
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adev->doorbell_index.uvd_vce.vce_ring6_7 = AMDGPU_VEGA20_DOORBELL64_VCE_RING6_7;
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adev->doorbell_index.first_non_cp = AMDGPU_VEGA20_DOORBELL64_FIRST_NON_CP;
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adev->doorbell_index.last_non_cp = AMDGPU_VEGA20_DOORBELL64_LAST_NON_CP;
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adev->doorbell_index.max_assignment = AMDGPU_VEGA20_DOORBELL_MAX_ASSIGNMENT << 1;
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adev->doorbell_index.sdma_doorbell_range = 20;
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}
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