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drm/amd/display: enable pipe power gating by default 

[why]
ASIC requirement.

[how]
Make disable_*_power_gate to false.

Signed-off-by: Sung Joon Kim <sungjoon.kim@amd.com>
Reviewed-by: Charlene Liu <Charlene.Liu@amd.com>
Acked-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Sung Joon Kim 2020-11-13 11:01:19 -05:00 committed by Alex Deucher
parent 3ba0a5f3ee
commit 823b3169fb
1 changed files with 4 additions and 4 deletions
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8
drivers/gpu/drm/amd/display/dc/dcn301/dcn301_resource.c
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@ -850,8 +850,8 @@ static const struct dc_debug_options debug_defaults_drv = {
.force_abm_enable = false,
.timing_trace = false,
.clock_trace = true,
.disable_dpp_power_gate = true,
.disable_hubp_power_gate = true,
.disable_dpp_power_gate = false,
.disable_hubp_power_gate = false,
.disable_clock_gate = true,
.disable_pplib_clock_request = true,
.disable_pplib_wm_range = true,
@ -873,8 +873,8 @@ static const struct dc_debug_options debug_defaults_diags = {
.force_abm_enable = false,
.timing_trace = true,
.clock_trace = true,
.disable_dpp_power_gate = true,
.disable_hubp_power_gate = true,
.disable_dpp_power_gate = false,
.disable_hubp_power_gate = false,
.disable_clock_gate = true,
.disable_pplib_clock_request = true,
.disable_pplib_wm_range = true,