UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

spi: Rename SPI_MASTER_GPIO_SS to SPI_CONTROLLER_GPIO_SS 

Rename SPI_MASTER_GPIO_SS to SPI_CONTROLLER_GPIO_SS and
convert the users to SPI_CONTROLLER_GPIO_SS to follow
the new naming shema.

Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230710154932.68377-14-andriy.shevchenko@linux.intel.com
Reviewed-by: Serge Semin <fancer.lancer@gmail.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Andy Shevchenko 2023-07-10 18:49:30 +03:00 committed by Mark Brown
parent 90366cd601
commit 82238d2cbd
No known key found for this signature in database
GPG Key ID: 24D68B725D5487D0
12 changed files with 15 additions and 16 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
drivers/spi/spi-ath79.c
View File

@ -185,7 +185,7 @@ static int ath79_spi_probe(struct platform_device *pdev)
host->use_gpio_descriptors = true;
host->bits_per_word_mask = SPI_BPW_RANGE_MASK(1, 32);
host->flags = SPI_MASTER_GPIO_SS;
host->flags = SPI_CONTROLLER_GPIO_SS;
host->num_chipselect = 3;
host->mem_ops = &ath79_mem_ops;

2
drivers/spi/spi-atmel.c
View File

@ -1476,7 +1476,7 @@ static int atmel_spi_probe(struct platform_device *pdev)
host->num_chipselect = 4;
host->setup = atmel_spi_setup;
host->flags = (SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_MUST_TX |
SPI_MASTER_GPIO_SS);
SPI_CONTROLLER_GPIO_SS);
host->transfer_one = atmel_spi_one_transfer;
host->set_cs = atmel_spi_set_cs;
host->cleanup = atmel_spi_cleanup;

6
drivers/spi/spi-bitbang.c
View File

@ -349,11 +349,11 @@ int spi_bitbang_init(struct spi_bitbang *bitbang)
/*
* We only need the chipselect callback if we are actually using it.
* If we just use GPIO descriptors, it is surplus. If the
* SPI_MASTER_GPIO_SS flag is set, we always need to call the
* SPI_CONTROLLER_GPIO_SS flag is set, we always need to call the
* driver-specific chipselect routine.
*/
custom_cs = (!master->use_gpio_descriptors ||
(master->flags & SPI_MASTER_GPIO_SS));
(master->flags & SPI_CONTROLLER_GPIO_SS));
if (custom_cs && !bitbang->chipselect)
return -EINVAL;
@ -371,7 +371,7 @@ int spi_bitbang_init(struct spi_bitbang *bitbang)
master->transfer_one = spi_bitbang_transfer_one;
/*
* When using GPIO descriptors, the ->set_cs() callback doesn't even
* get called unless SPI_MASTER_GPIO_SS is set.
* get called unless SPI_CONTROLLER_GPIO_SS is set.
*/
if (custom_cs)
master->set_cs = spi_bitbang_set_cs;

2
drivers/spi/spi-davinci.c
View File

@ -939,7 +939,7 @@ static int davinci_spi_probe(struct platform_device *pdev)
master->bus_num = pdev->id;
master->num_chipselect = pdata->num_chipselect;
master->bits_per_word_mask = SPI_BPW_RANGE_MASK(2, 16);
master->flags = SPI_CONTROLLER_MUST_RX | SPI_MASTER_GPIO_SS;
master->flags = SPI_CONTROLLER_MUST_RX | SPI_CONTROLLER_GPIO_SS;
master->setup = davinci_spi_setup;
master->cleanup = davinci_spi_cleanup;
master->can_dma = davinci_spi_can_dma;

2
drivers/spi/spi-dw-core.c
View File

@ -932,7 +932,7 @@ int dw_spi_add_host(struct device *dev, struct dw_spi *dws)
if (dws->mem_ops.exec_op)
master->mem_ops = &dws->mem_ops;
master->max_speed_hz = dws->max_freq;
master->flags = SPI_MASTER_GPIO_SS;
master->flags = SPI_CONTROLLER_GPIO_SS;
master->auto_runtime_pm = true;
/* Get default rx sample delay */

2
drivers/spi/spi-gpio.c
View File

@ -434,7 +434,7 @@ static int spi_gpio_probe(struct platform_device *pdev)
* line, that we need to do on selection. This makes the local
* callback for chipselect always get called.
*/
master->flags |= SPI_MASTER_GPIO_SS;
master->flags |= SPI_CONTROLLER_GPIO_SS;
bb->chipselect = spi_gpio_chipselect;
bb->set_line_direction = spi_gpio_set_direction;

2
drivers/spi/spi-imx.c
View File

@ -1779,7 +1779,7 @@ static int spi_imx_probe(struct platform_device *pdev)
if (is_imx51_ecspi(spi_imx) || is_imx53_ecspi(spi_imx)) {
controller->max_native_cs = 4;
controller->flags |= SPI_MASTER_GPIO_SS;
controller->flags |= SPI_CONTROLLER_GPIO_SS;
}
spi_imx->spi_drctl = spi_drctl;

2
drivers/spi/spi-orion.c
View File

@ -677,7 +677,7 @@ static int orion_spi_probe(struct platform_device *pdev)
master->bits_per_word_mask = SPI_BPW_MASK(8) | SPI_BPW_MASK(16);
master->auto_runtime_pm = true;
master->use_gpio_descriptors = true;
master->flags = SPI_MASTER_GPIO_SS;
master->flags = SPI_CONTROLLER_GPIO_SS;
platform_set_drvdata(pdev, master);

2
drivers/spi/spi-rockchip.c
View File

@ -858,7 +858,7 @@ static int rockchip_spi_probe(struct platform_device *pdev)
ctlr->mode_bits |= SPI_NO_CS;
ctlr->slave_abort = rockchip_spi_slave_abort;
} else {
ctlr->flags = SPI_MASTER_GPIO_SS;
ctlr->flags = SPI_CONTROLLER_GPIO_SS;
ctlr->max_native_cs = ROCKCHIP_SPI_MAX_CS_NUM;
/*
* rk spi0 has two native cs, spi1..5 one cs only

2
drivers/spi/spi-sifive.c
View File

@ -379,7 +379,7 @@ static int sifive_spi_probe(struct platform_device *pdev)
* we need to "left-align" the bits (unless SPI_LSB_FIRST)
*/
master->bits_per_word_mask = SPI_BPW_MASK(8);
master->flags = SPI_CONTROLLER_MUST_TX | SPI_MASTER_GPIO_SS;
master->flags = SPI_CONTROLLER_MUST_TX | SPI_CONTROLLER_GPIO_SS;
master->prepare_message = sifive_spi_prepare_message;
master->set_cs = sifive_spi_set_cs;
master->transfer_one = sifive_spi_transfer_one;

4
drivers/spi/spi.c
View File

@ -1006,7 +1006,7 @@ static void spi_set_cs(struct spi_device *spi, bool enable, bool force)
gpiod_set_value_cansleep(spi_get_csgpiod(spi, 0), activate);
}
/* Some SPI masters need both GPIO CS & slave_select */
if ((spi->controller->flags & SPI_MASTER_GPIO_SS) &&
if ((spi->controller->flags & SPI_CONTROLLER_GPIO_SS) &&
spi->controller->set_cs)
spi->controller->set_cs(spi, !enable);
} else if (spi->controller->set_cs) {
@ -3052,7 +3052,7 @@ static int spi_get_gpio_descs(struct spi_controller *ctlr)
ctlr->unused_native_cs = ffs(~native_cs_mask) - 1;
if ((ctlr->flags & SPI_MASTER_GPIO_SS) && num_cs_gpios &&
if ((ctlr->flags & SPI_CONTROLLER_GPIO_SS) && num_cs_gpios &&
ctlr->max_native_cs && ctlr->unused_native_cs >= ctlr->max_native_cs) {
dev_err(dev, "No unused native chip select available\n");
return -EINVAL;

3
include/linux/spi/spi.h
View File

@ -562,8 +562,7 @@ struct spi_controller {
#define SPI_CONTROLLER_NO_TX BIT(2) /* Can't do buffer write */
#define SPI_CONTROLLER_MUST_RX BIT(3) /* Requires rx */
#define SPI_CONTROLLER_MUST_TX BIT(4) /* Requires tx */
#define SPI_MASTER_GPIO_SS BIT(5) /* GPIO CS must select slave */
#define SPI_CONTROLLER_GPIO_SS BIT(5) /* GPIO CS must select slave */
/* Flag indicating if the allocation of this struct is devres-managed */
bool devm_allocated;