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arm64: dts: ls1028a: Add properties node for Display output pixel clock 

The LS1028A has a clock domain PXLCLK0 used for the Display output
interface in the display core, independent of the system bus frequency,
for flexible clock design. This display core has its own pixel clock.

This patch enable the pixel clock provider on the LS1028A.

Signed-off-by: Wen He <wen.he_1@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Wen He 2019-08-12 18:02:24 +08:00 committed by Shawn Guo
parent 7cb220a75f
commit 81f36887ea
1 changed files with 10 additions and 3 deletions
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13
arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
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@ -72,11 +72,18 @@
clock-output-names = "sysclk";
};
dpclk: clock-dp {
osc_27m: clock-osc-27m {
compatible = "fixed-clock";
#clock-cells = <0>;
clock-frequency = <27000000>;
clock-output-names= "dpclk";
clock-output-names = "phy_27m";
};
dpclk: clock-controller@f1f0000 {
compatible = "fsl,ls1028a-plldig";
reg = <0x0 0xf1f0000 0x0 0xffff>;
#clock-cells = <1>;
clocks = <&osc_27m>;
};
aclk: clock-axi {
@ -639,7 +646,7 @@
interrupts = <0 222 IRQ_TYPE_LEVEL_HIGH>,
<0 223 IRQ_TYPE_LEVEL_HIGH>;
interrupt-names = "DE", "SE";
clocks = <&dpclk>, <&aclk>, <&aclk>, <&pclk>;
clocks = <&dpclk 0>, <&aclk>, <&aclk>, <&pclk>;
clock-names = "pxlclk", "mclk", "aclk", "pclk";
arm,malidp-output-port-lines = /bits/ 8 <8 8 8>;
arm,malidp-arqos-value = <0xd000d000>;