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Merge branch 'sh_eth-typos' 

Sergei Shtylyov says:

====================
sh_eth: fix typos/grammar

Here's a set of 3 patches against DaveM's 'net-next.git' repo plus the R8A77980
support patches posted earlier. They fix the comments typos/grammar and another
typo in the EESR bit...
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller 2018-05-20 18:56:43 -04:00
parent 6c8598b74e 6b14787ab1
commit 81ee33d873
2 changed files with 20 additions and 19 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

13
drivers/net/ethernet/renesas/sh_eth.c
View File

@ -706,7 +706,7 @@ static struct sh_eth_cpu_data rcar_gen1_data = {
EESIPR_RTLFIP | EESIPR_RTSFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
EESIPR_PREIP | EESIPR_CERFIP, EESIPR_PREIP | EESIPR_CERFIP,
.tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO, .tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_TRO,
.eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE | .eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE, EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
.fdr_value = 0x00000f0f, .fdr_value = 0x00000f0f,
@ -738,7 +738,7 @@ static struct sh_eth_cpu_data rcar_gen2_data = {
EESIPR_RTLFIP | EESIPR_RTSFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
EESIPR_PREIP | EESIPR_CERFIP, EESIPR_PREIP | EESIPR_CERFIP,
.tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO, .tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_TRO,
.eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE | .eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE, EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
.fdr_value = 0x00000f0f, .fdr_value = 0x00000f0f,
@ -774,7 +774,7 @@ static struct sh_eth_cpu_data r8a77980_data = {
EESIPR_RTLFIP | EESIPR_RTSFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
EESIPR_PREIP | EESIPR_CERFIP, EESIPR_PREIP | EESIPR_CERFIP,
.tx_check = EESR_FTC | EESR_CD | EESR_RTO, .tx_check = EESR_FTC | EESR_CD | EESR_TRO,
.eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT | .eesr_err_check = EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |
EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_RFE | EESR_RDE | EESR_RFRMER |
EESR_TFE | EESR_TDE | EESR_ECI, EESR_TFE | EESR_TDE | EESR_ECI,
@ -831,7 +831,7 @@ static struct sh_eth_cpu_data sh7724_data = {
EESIPR_RTLFIP | EESIPR_RTSFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
EESIPR_PREIP | EESIPR_CERFIP, EESIPR_PREIP | EESIPR_CERFIP,
.tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO, .tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_TRO,
.eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE | .eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE, EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
@ -876,7 +876,7 @@ static struct sh_eth_cpu_data sh7757_data = {
EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP | EESIPR_RRFIP | EESIPR_RTLFIP | EESIPR_RTSFIP |
EESIPR_PREIP | EESIPR_CERFIP, EESIPR_PREIP | EESIPR_CERFIP,
.tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_RTO, .tx_check = EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | EESR_TRO,
.eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE | .eesr_err_check = EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE |
EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE, EESR_RDE | EESR_RFRMER | EESR_TFE | EESR_TDE,
@ -1481,8 +1481,9 @@ static int sh_eth_dev_init(struct net_device *ndev)
if (mdp->cd->nbst) if (mdp->cd->nbst)
sh_eth_modify(ndev, EDMR, EDMR_NBST, EDMR_NBST); sh_eth_modify(ndev, EDMR, EDMR_NBST, EDMR_NBST);
/* Burst cycle count upper-limit */
if (mdp->cd->bculr) if (mdp->cd->bculr)
sh_eth_write(ndev, 0x800, BCULR); /* Burst sycle set */ sh_eth_write(ndev, 0x800, BCULR);
sh_eth_write(ndev, mdp->cd->fcftr_value, FCFTR); sh_eth_write(ndev, mdp->cd->fcftr_value, FCFTR);

26
drivers/net/ethernet/renesas/sh_eth.h
View File

@ -243,7 +243,7 @@ enum EESR_BIT {
EESR_CND = 0x00000800, EESR_CND = 0x00000800,
EESR_DLC = 0x00000400, EESR_DLC = 0x00000400,
EESR_CD = 0x00000200, EESR_CD = 0x00000200,
EESR_RTO = 0x00000100, EESR_TRO = 0x00000100,
EESR_RMAF = 0x00000080, EESR_RMAF = 0x00000080,
EESR_CEEF = 0x00000040, EESR_CEEF = 0x00000040,
EESR_CELF = 0x00000020, EESR_CELF = 0x00000020,
@ -263,7 +263,7 @@ enum EESR_BIT {
EESR_CERF) /* Recv frame CRC error */ EESR_CERF) /* Recv frame CRC error */
#define DEFAULT_TX_CHECK (EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | \ #define DEFAULT_TX_CHECK (EESR_FTC | EESR_CND | EESR_DLC | EESR_CD | \
EESR_RTO) EESR_TRO)
#define DEFAULT_EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE | \ #define DEFAULT_EESR_ERR_CHECK (EESR_TWB | EESR_TABT | EESR_RABT | EESR_RFE | \
EESR_RDE | EESR_RFRMER | EESR_ADE | \ EESR_RDE | EESR_RFRMER | EESR_ADE | \
EESR_TFE | EESR_TDE) EESR_TFE | EESR_TDE)
@ -499,21 +499,21 @@ struct sh_eth_cpu_data {
/* hardware features */ /* hardware features */
unsigned long irq_flags; /* IRQ configuration flags */ unsigned long irq_flags; /* IRQ configuration flags */
unsigned no_psr:1; /* EtherC DO NOT have PSR */ unsigned no_psr:1; /* EtherC DOES NOT have PSR */
unsigned apr:1; /* EtherC have APR */ unsigned apr:1; /* EtherC has APR */
unsigned mpr:1; /* EtherC have MPR */ unsigned mpr:1; /* EtherC has MPR */
unsigned tpauser:1; /* EtherC have TPAUSER */ unsigned tpauser:1; /* EtherC has TPAUSER */
unsigned bculr:1; /* EtherC have BCULR */ unsigned bculr:1; /* EtherC has BCULR */
unsigned tsu:1; /* EtherC have TSU */ unsigned tsu:1; /* EtherC has TSU */
unsigned hw_swap:1; /* E-DMAC have DE bit in EDMR */ unsigned hw_swap:1; /* E-DMAC has DE bit in EDMR */
unsigned nbst:1; /* E-DMAC has NBST bit in EDMR */ unsigned nbst:1; /* E-DMAC has NBST bit in EDMR */
unsigned rpadir:1; /* E-DMAC have RPADIR */ unsigned rpadir:1; /* E-DMAC has RPADIR */
unsigned no_trimd:1; /* E-DMAC DO NOT have TRIMD */ unsigned no_trimd:1; /* E-DMAC DOES NOT have TRIMD */
unsigned no_ade:1; /* E-DMAC DO NOT have ADE bit in EESR */ unsigned no_ade:1; /* E-DMAC DOES NOT have ADE bit in EESR */
unsigned no_xdfar:1; /* E-DMAC DOES NOT have RDFAR/TDFAR */ unsigned no_xdfar:1; /* E-DMAC DOES NOT have RDFAR/TDFAR */
unsigned xdfar_rw:1; /* E-DMAC has writeable RDFAR/TDFAR */ unsigned xdfar_rw:1; /* E-DMAC has writeable RDFAR/TDFAR */
unsigned hw_checksum:1; /* E-DMAC has CSMR */ unsigned hw_checksum:1; /* E-DMAC has CSMR */
unsigned select_mii:1; /* EtherC have RMII_MII (MII select register) */ unsigned select_mii:1; /* EtherC has RMII_MII (MII select register) */
unsigned rmiimode:1; /* EtherC has RMIIMODE register */ unsigned rmiimode:1; /* EtherC has RMIIMODE register */
unsigned rtrate:1; /* EtherC has RTRATE register */ unsigned rtrate:1; /* EtherC has RTRATE register */
unsigned magic:1; /* EtherC has ECMR.MPDE and ECSR.MPD */ unsigned magic:1; /* EtherC has ECMR.MPDE and ECSR.MPD */