ASoC: rt5670: improve PLL function's stability

Set PR-38 register to 0x1fe1 will make PLL function more stable.

Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Bard Liao 2018-05-17 13:54:08 +08:00 committed by Mark Brown
parent 74f24d8728
commit 81dd1c5dcf
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1 changed files with 1 additions and 1 deletions

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@ -71,7 +71,7 @@ static const struct regmap_range_cfg rt5670_ranges[] = {
static const struct reg_sequence init_list[] = {
{ RT5670_PR_BASE + 0x14, 0x9a8a },
{ RT5670_PR_BASE + 0x38, 0x3ba1 },
{ RT5670_PR_BASE + 0x38, 0x1fe1 },
{ RT5670_PR_BASE + 0x3d, 0x3640 },
{ 0x8a, 0x0123 },
};