drivers: net: xgene: Change ring manager to use function pointers
This is a preparatory patch for adding ethernet support for APM X-Gene ethernet driver to work with ring manager v2. Added xgene_ring_ops structure for storing chip specific ring manager properties and functions. Signed-off-by: Iyappan Subramanian <isubramanian@apm.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
parent
f828ad0ce2
commit
81cefb81db
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@ -87,10 +87,11 @@ static void xgene_enet_ring_rd32(struct xgene_enet_desc_ring *ring,
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static void xgene_enet_write_ring_state(struct xgene_enet_desc_ring *ring)
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static void xgene_enet_write_ring_state(struct xgene_enet_desc_ring *ring)
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{
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{
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struct xgene_enet_pdata *pdata = netdev_priv(ring->ndev);
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int i;
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int i;
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xgene_enet_ring_wr32(ring, CSR_RING_CONFIG, ring->num);
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xgene_enet_ring_wr32(ring, CSR_RING_CONFIG, ring->num);
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for (i = 0; i < NUM_RING_CONFIG; i++) {
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for (i = 0; i < pdata->ring_ops->num_ring_config; i++) {
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xgene_enet_ring_wr32(ring, CSR_RING_WR_BASE + (i * 4),
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xgene_enet_ring_wr32(ring, CSR_RING_WR_BASE + (i * 4),
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ring->state[i]);
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ring->state[i]);
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}
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}
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@ -98,7 +99,7 @@ static void xgene_enet_write_ring_state(struct xgene_enet_desc_ring *ring)
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static void xgene_enet_clr_ring_state(struct xgene_enet_desc_ring *ring)
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static void xgene_enet_clr_ring_state(struct xgene_enet_desc_ring *ring)
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{
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{
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memset(ring->state, 0, sizeof(u32) * NUM_RING_CONFIG);
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memset(ring->state, 0, sizeof(ring->state));
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xgene_enet_write_ring_state(ring);
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xgene_enet_write_ring_state(ring);
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}
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}
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@ -141,8 +142,8 @@ static void xgene_enet_clr_desc_ring_id(struct xgene_enet_desc_ring *ring)
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xgene_enet_ring_wr32(ring, CSR_RING_ID_BUF, 0);
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xgene_enet_ring_wr32(ring, CSR_RING_ID_BUF, 0);
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}
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}
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struct xgene_enet_desc_ring *xgene_enet_setup_ring(
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static struct xgene_enet_desc_ring *xgene_enet_setup_ring(
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struct xgene_enet_desc_ring *ring)
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struct xgene_enet_desc_ring *ring)
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{
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{
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u32 size = ring->size;
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u32 size = ring->size;
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u32 i, data;
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u32 i, data;
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@ -168,7 +169,7 @@ struct xgene_enet_desc_ring *xgene_enet_setup_ring(
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return ring;
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return ring;
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}
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}
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void xgene_enet_clear_ring(struct xgene_enet_desc_ring *ring)
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static void xgene_enet_clear_ring(struct xgene_enet_desc_ring *ring)
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{
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{
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u32 data;
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u32 data;
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bool is_bufpool;
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bool is_bufpool;
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@ -186,6 +187,22 @@ out:
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xgene_enet_clr_ring_state(ring);
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xgene_enet_clr_ring_state(ring);
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}
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}
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static void xgene_enet_wr_cmd(struct xgene_enet_desc_ring *ring, int count)
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{
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iowrite32(count, ring->cmd);
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}
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static u32 xgene_enet_ring_len(struct xgene_enet_desc_ring *ring)
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{
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u32 __iomem *cmd_base = ring->cmd_base;
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u32 ring_state, num_msgs;
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ring_state = ioread32(&cmd_base[1]);
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num_msgs = GET_VAL(NUMMSGSINQ, ring_state);
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return num_msgs;
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}
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void xgene_enet_parse_error(struct xgene_enet_desc_ring *ring,
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void xgene_enet_parse_error(struct xgene_enet_desc_ring *ring,
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struct xgene_enet_pdata *pdata,
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struct xgene_enet_pdata *pdata,
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enum xgene_enet_err_code status)
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enum xgene_enet_err_code status)
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@ -803,3 +820,12 @@ struct xgene_port_ops xgene_gport_ops = {
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.cle_bypass = xgene_enet_cle_bypass,
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.cle_bypass = xgene_enet_cle_bypass,
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.shutdown = xgene_gport_shutdown,
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.shutdown = xgene_gport_shutdown,
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};
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};
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struct xgene_ring_ops xgene_ring1_ops = {
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.num_ring_config = NUM_RING_CONFIG,
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.num_ring_id_shift = 6,
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.setup = xgene_enet_setup_ring,
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.clear = xgene_enet_clear_ring,
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.wr_cmd = xgene_enet_wr_cmd,
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.len = xgene_enet_ring_len,
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};
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@ -26,6 +26,7 @@
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struct xgene_enet_pdata;
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struct xgene_enet_pdata;
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struct xgene_enet_stats;
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struct xgene_enet_stats;
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struct xgene_enet_desc_ring;
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/* clears and then set bits */
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/* clears and then set bits */
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static inline void xgene_set_bits(u32 *dst, u32 val, u32 start, u32 len)
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static inline void xgene_set_bits(u32 *dst, u32 val, u32 start, u32 len)
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@ -314,9 +315,6 @@ static inline u16 xgene_enet_get_numslots(u16 id, u32 size)
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size / WORK_DESC_SIZE;
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size / WORK_DESC_SIZE;
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}
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}
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struct xgene_enet_desc_ring *xgene_enet_setup_ring(
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struct xgene_enet_desc_ring *ring);
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void xgene_enet_clear_ring(struct xgene_enet_desc_ring *ring);
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void xgene_enet_parse_error(struct xgene_enet_desc_ring *ring,
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void xgene_enet_parse_error(struct xgene_enet_desc_ring *ring,
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struct xgene_enet_pdata *pdata,
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struct xgene_enet_pdata *pdata,
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enum xgene_enet_err_code status);
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enum xgene_enet_err_code status);
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@ -327,5 +325,6 @@ bool xgene_ring_mgr_init(struct xgene_enet_pdata *p);
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extern struct xgene_mac_ops xgene_gmac_ops;
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extern struct xgene_mac_ops xgene_gmac_ops;
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extern struct xgene_port_ops xgene_gport_ops;
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extern struct xgene_port_ops xgene_gport_ops;
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extern struct xgene_ring_ops xgene_ring1_ops;
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#endif /* __XGENE_ENET_HW_H__ */
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#endif /* __XGENE_ENET_HW_H__ */
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@ -48,6 +48,7 @@ static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,
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{
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{
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struct sk_buff *skb;
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struct sk_buff *skb;
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struct xgene_enet_raw_desc16 *raw_desc;
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struct xgene_enet_raw_desc16 *raw_desc;
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struct xgene_enet_pdata *pdata;
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struct net_device *ndev;
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struct net_device *ndev;
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struct device *dev;
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struct device *dev;
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dma_addr_t dma_addr;
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dma_addr_t dma_addr;
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@ -58,6 +59,7 @@ static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,
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ndev = buf_pool->ndev;
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ndev = buf_pool->ndev;
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dev = ndev_to_dev(buf_pool->ndev);
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dev = ndev_to_dev(buf_pool->ndev);
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pdata = netdev_priv(ndev);
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bufdatalen = BUF_LEN_CODE_2K | (SKB_BUFFER_SIZE & GENMASK(11, 0));
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bufdatalen = BUF_LEN_CODE_2K | (SKB_BUFFER_SIZE & GENMASK(11, 0));
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len = XGENE_ENET_MAX_MTU;
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len = XGENE_ENET_MAX_MTU;
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@ -82,7 +84,7 @@ static int xgene_enet_refill_bufpool(struct xgene_enet_desc_ring *buf_pool,
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tail = (tail + 1) & slots;
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tail = (tail + 1) & slots;
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}
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}
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iowrite32(nbuf, buf_pool->cmd);
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pdata->ring_ops->wr_cmd(buf_pool, nbuf);
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buf_pool->tail = tail;
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buf_pool->tail = tail;
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return 0;
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return 0;
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@ -102,26 +104,16 @@ static u8 xgene_enet_hdr_len(const void *data)
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return (eth->h_proto == htons(ETH_P_8021Q)) ? VLAN_ETH_HLEN : ETH_HLEN;
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return (eth->h_proto == htons(ETH_P_8021Q)) ? VLAN_ETH_HLEN : ETH_HLEN;
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}
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}
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static u32 xgene_enet_ring_len(struct xgene_enet_desc_ring *ring)
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{
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u32 __iomem *cmd_base = ring->cmd_base;
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u32 ring_state, num_msgs;
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ring_state = ioread32(&cmd_base[1]);
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num_msgs = ring_state & CREATE_MASK(NUMMSGSINQ_POS, NUMMSGSINQ_LEN);
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return num_msgs >> NUMMSGSINQ_POS;
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}
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static void xgene_enet_delete_bufpool(struct xgene_enet_desc_ring *buf_pool)
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static void xgene_enet_delete_bufpool(struct xgene_enet_desc_ring *buf_pool)
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{
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{
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struct xgene_enet_pdata *pdata = netdev_priv(buf_pool->ndev);
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struct xgene_enet_raw_desc16 *raw_desc;
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struct xgene_enet_raw_desc16 *raw_desc;
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u32 slots = buf_pool->slots - 1;
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u32 slots = buf_pool->slots - 1;
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u32 tail = buf_pool->tail;
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u32 tail = buf_pool->tail;
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u32 userinfo;
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u32 userinfo;
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int i, len;
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int i, len;
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len = xgene_enet_ring_len(buf_pool);
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len = pdata->ring_ops->len(buf_pool);
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for (i = 0; i < len; i++) {
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for (i = 0; i < len; i++) {
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tail = (tail - 1) & slots;
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tail = (tail - 1) & slots;
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raw_desc = &buf_pool->raw_desc16[tail];
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raw_desc = &buf_pool->raw_desc16[tail];
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@ -131,7 +123,7 @@ static void xgene_enet_delete_bufpool(struct xgene_enet_desc_ring *buf_pool)
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dev_kfree_skb_any(buf_pool->rx_skb[userinfo]);
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dev_kfree_skb_any(buf_pool->rx_skb[userinfo]);
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}
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}
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iowrite32(-len, buf_pool->cmd);
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pdata->ring_ops->wr_cmd(buf_pool, -len);
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buf_pool->tail = tail;
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buf_pool->tail = tail;
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}
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}
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@ -263,8 +255,8 @@ static netdev_tx_t xgene_enet_start_xmit(struct sk_buff *skb,
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struct xgene_enet_desc_ring *cp_ring = tx_ring->cp_ring;
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struct xgene_enet_desc_ring *cp_ring = tx_ring->cp_ring;
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u32 tx_level, cq_level;
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u32 tx_level, cq_level;
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tx_level = xgene_enet_ring_len(tx_ring);
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tx_level = pdata->ring_ops->len(tx_ring);
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cq_level = xgene_enet_ring_len(cp_ring);
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cq_level = pdata->ring_ops->len(cp_ring);
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if (unlikely(tx_level > pdata->tx_qcnt_hi ||
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if (unlikely(tx_level > pdata->tx_qcnt_hi ||
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cq_level > pdata->cp_qcnt_hi)) {
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cq_level > pdata->cp_qcnt_hi)) {
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netif_stop_queue(ndev);
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netif_stop_queue(ndev);
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@ -276,7 +268,7 @@ static netdev_tx_t xgene_enet_start_xmit(struct sk_buff *skb,
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return NETDEV_TX_OK;
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return NETDEV_TX_OK;
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}
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}
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iowrite32(1, tx_ring->cmd);
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pdata->ring_ops->wr_cmd(tx_ring, 1);
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skb_tx_timestamp(skb);
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skb_tx_timestamp(skb);
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tx_ring->tail = (tx_ring->tail + 1) & (tx_ring->slots - 1);
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tx_ring->tail = (tx_ring->tail + 1) & (tx_ring->slots - 1);
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@ -389,11 +381,11 @@ static int xgene_enet_process_ring(struct xgene_enet_desc_ring *ring,
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} while (--budget);
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} while (--budget);
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if (likely(count)) {
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if (likely(count)) {
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iowrite32(-count, ring->cmd);
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pdata->ring_ops->wr_cmd(ring, -count);
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ring->head = head;
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ring->head = head;
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if (netif_queue_stopped(ring->ndev)) {
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if (netif_queue_stopped(ring->ndev)) {
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if (xgene_enet_ring_len(ring) < pdata->cp_qcnt_low)
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if (pdata->ring_ops->len(ring) < pdata->cp_qcnt_low)
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netif_wake_queue(ring->ndev);
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netif_wake_queue(ring->ndev);
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}
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}
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}
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}
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@ -510,6 +502,7 @@ static int xgene_enet_open(struct net_device *ndev)
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else
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else
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schedule_delayed_work(&pdata->link_work, PHY_POLL_LINK_OFF);
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schedule_delayed_work(&pdata->link_work, PHY_POLL_LINK_OFF);
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netif_carrier_off(ndev);
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netif_start_queue(ndev);
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netif_start_queue(ndev);
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return ret;
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return ret;
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@ -545,7 +538,7 @@ static void xgene_enet_delete_ring(struct xgene_enet_desc_ring *ring)
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pdata = netdev_priv(ring->ndev);
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pdata = netdev_priv(ring->ndev);
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dev = ndev_to_dev(ring->ndev);
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dev = ndev_to_dev(ring->ndev);
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xgene_enet_clear_ring(ring);
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pdata->ring_ops->clear(ring);
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dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
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dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
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}
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}
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@ -598,15 +591,17 @@ static int xgene_enet_get_ring_size(struct device *dev,
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static void xgene_enet_free_desc_ring(struct xgene_enet_desc_ring *ring)
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static void xgene_enet_free_desc_ring(struct xgene_enet_desc_ring *ring)
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{
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{
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struct xgene_enet_pdata *pdata;
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struct device *dev;
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struct device *dev;
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if (!ring)
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if (!ring)
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return;
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return;
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dev = ndev_to_dev(ring->ndev);
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dev = ndev_to_dev(ring->ndev);
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pdata = netdev_priv(ring->ndev);
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if (ring->desc_addr) {
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if (ring->desc_addr) {
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xgene_enet_clear_ring(ring);
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pdata->ring_ops->clear(ring);
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dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
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dma_free_coherent(dev, ring->size, ring->desc_addr, ring->dma);
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}
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}
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devm_kfree(dev, ring);
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devm_kfree(dev, ring);
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@ -670,7 +665,7 @@ static struct xgene_enet_desc_ring *xgene_enet_create_desc_ring(
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ring->cmd_base = pdata->ring_cmd_addr + (ring->num << 6);
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ring->cmd_base = pdata->ring_cmd_addr + (ring->num << 6);
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ring->cmd = ring->cmd_base + INC_DEC_CMD_ADDR;
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ring->cmd = ring->cmd_base + INC_DEC_CMD_ADDR;
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ring = xgene_enet_setup_ring(ring);
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ring = pdata->ring_ops->setup(ring);
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netdev_dbg(ndev, "ring info: num=%d size=%d id=%d slots=%d\n",
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netdev_dbg(ndev, "ring info: num=%d size=%d id=%d slots=%d\n",
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ring->num, ring->size, ring->id, ring->slots);
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ring->num, ring->size, ring->id, ring->slots);
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@ -1051,6 +1046,7 @@ static void xgene_enet_setup_ops(struct xgene_enet_pdata *pdata)
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break;
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break;
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}
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}
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pdata->ring_ops = &xgene_ring1_ops;
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}
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}
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static void xgene_enet_napi_add(struct xgene_enet_pdata *pdata)
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static void xgene_enet_napi_add(struct xgene_enet_pdata *pdata)
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@ -105,6 +105,15 @@ struct xgene_port_ops {
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void (*shutdown)(struct xgene_enet_pdata *pdata);
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void (*shutdown)(struct xgene_enet_pdata *pdata);
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};
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};
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struct xgene_ring_ops {
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u8 num_ring_config;
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u8 num_ring_id_shift;
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struct xgene_enet_desc_ring * (*setup)(struct xgene_enet_desc_ring *);
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void (*clear)(struct xgene_enet_desc_ring *);
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void (*wr_cmd)(struct xgene_enet_desc_ring *, int);
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u32 (*len)(struct xgene_enet_desc_ring *);
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};
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/* ethernet private data */
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/* ethernet private data */
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struct xgene_enet_pdata {
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struct xgene_enet_pdata {
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struct net_device *ndev;
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struct net_device *ndev;
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@ -136,6 +145,7 @@ struct xgene_enet_pdata {
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struct rtnl_link_stats64 stats;
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struct rtnl_link_stats64 stats;
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struct xgene_mac_ops *mac_ops;
|
struct xgene_mac_ops *mac_ops;
|
||||||
struct xgene_port_ops *port_ops;
|
struct xgene_port_ops *port_ops;
|
||||||
|
struct xgene_ring_ops *ring_ops;
|
||||||
struct delayed_work link_work;
|
struct delayed_work link_work;
|
||||||
u32 port_id;
|
u32 port_id;
|
||||||
u8 cpu_bufnum;
|
u8 cpu_bufnum;
|
||||||
|
|
Loading…
Reference in New Issue