UbiquitousOS
/
OpenCloudOS-Kernel
mirror of https://gitee.com/OpenCloudOS/OpenCloudOS-Kernel.git
11
0
Fork 0
Code Issues Projects Releases Wiki Activity

ARM: S5PV210: 2nd Change to using s3c_gpio_cfgall_range() 

This patch changes the code setting range of GPIO pins' configuration and
pull state to use the recently introduced s3c_gpio_cfgpin_range().
NOTE: This is for missed things from the previous patch.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Kukjin Kim 2010-10-01 20:54:56 +09:00
parent e27ecd7306
commit 818ac8c134
6 changed files with 33 additions and 63 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

19
arch/arm/mach-s5pv210/dev-spi.c
View File

@ -35,23 +35,15 @@ static char *spi_src_clks[] = {
*/
static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
{
unsigned int base;
switch (pdev->id) {
case 0:
s3c_gpio_cfgpin(S5PV210_GPB(0), S3C_GPIO_SFN(2));
s3c_gpio_cfgpin(S5PV210_GPB(1), S3C_GPIO_SFN(2));
s3c_gpio_cfgpin(S5PV210_GPB(2), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV210_GPB(0), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5PV210_GPB(1), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5PV210_GPB(2), S3C_GPIO_PULL_UP);
base = S5PV210_GPB(0);
break;
case 1:
s3c_gpio_cfgpin(S5PV210_GPB(4), S3C_GPIO_SFN(2));
s3c_gpio_cfgpin(S5PV210_GPB(5), S3C_GPIO_SFN(2));
s3c_gpio_cfgpin(S5PV210_GPB(6), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV210_GPB(4), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5PV210_GPB(5), S3C_GPIO_PULL_UP);
s3c_gpio_setpull(S5PV210_GPB(6), S3C_GPIO_PULL_UP);
base = S5PV210_GPB(4);
break;
default:
@ -59,6 +51,9 @@ static int s5pv210_spi_cfg_gpio(struct platform_device *pdev)
return -EINVAL;
}
s3c_gpio_cfgall_range(base, 3,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
return 0;
}

6
arch/arm/mach-s5pv210/setup-i2c0.c
View File

@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c0_cfg_gpio(struct platform_device *dev)
{
s3c_gpio_cfgpin(S5PV210_GPD1(0), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV210_GPD1(0), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PV210_GPD1(1), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV210_GPD1(1), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(S5PV210_GPD1(0), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
}

6
arch/arm/mach-s5pv210/setup-i2c1.c
View File

@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c1_cfg_gpio(struct platform_device *dev)
{
s3c_gpio_cfgpin(S5PV210_GPD1(2), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV210_GPD1(2), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PV210_GPD1(3), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV210_GPD1(3), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(S5PV210_GPD1(2), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
}

6
arch/arm/mach-s5pv210/setup-i2c2.c
View File

@ -23,8 +23,6 @@ struct platform_device; /* don't need the contents */
void s3c_i2c2_cfg_gpio(struct platform_device *dev)
{
s3c_gpio_cfgpin(S5PV210_GPD1(4), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV210_GPD1(4), S3C_GPIO_PULL_UP);
s3c_gpio_cfgpin(S5PV210_GPD1(5), S3C_GPIO_SFN(2));
s3c_gpio_setpull(S5PV210_GPD1(5), S3C_GPIO_PULL_UP);
s3c_gpio_cfgall_range(S5PV210_GPD1(4), 2,
S3C_GPIO_SFN(2), S3C_GPIO_PULL_UP);
}

43
arch/arm/mach-s5pv210/setup-ide.c
View File

@ -15,36 +15,25 @@
#include <plat/gpio-cfg.h>
static void s5pv210_ide_cfg_gpios(unsigned int base, unsigned int nr)
{
s3c_gpio_cfgall_range(base, nr, S3C_GPIO_SFN(4), S3C_GPIO_PULL_NONE);
for (; nr > 0; nr--, base++)
s5p_gpio_set_drvstr(base, S5P_GPIO_DRVSTR_LV4);
}
void s5pv210_ide_setup_gpio(void)
{
unsigned int gpio = 0;
/* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST, CF_DMACK */
s5pv210_ide_cfg_gpios(S5PV210_GPJ0(0), 8);
for (gpio = S5PV210_GPJ0(0); gpio <= S5PV210_GPJ0(7); gpio++) {
/* CF_Add[0 - 2], CF_IORDY, CF_INTRQ, CF_DMARQ, CF_DMARST,
CF_DMACK */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
/* CF_Data[0 - 7] */
s5pv210_ide_cfg_gpios(S5PV210_GPJ2(0), 8);
for (gpio = S5PV210_GPJ2(0); gpio <= S5PV210_GPJ2(7); gpio++) {
/*CF_Data[0 - 7] */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
/* CF_Data[8 - 15] */
s5pv210_ide_cfg_gpios(S5PV210_GPJ3(0), 8);
for (gpio = S5PV210_GPJ3(0); gpio <= S5PV210_GPJ3(7); gpio++) {
/* CF_Data[8 - 15] */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
for (gpio = S5PV210_GPJ4(0); gpio <= S5PV210_GPJ4(3); gpio++) {
/* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(4));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
s5p_gpio_set_drvstr(gpio, S5P_GPIO_DRVSTR_LV4);
}
/* CF_CS0, CF_CS1, CF_IORD, CF_IOWR */
s5pv210_ide_cfg_gpios(S5PV210_GPJ4(0), 4);
}

16
arch/arm/mach-s5pv210/setup-keypad.c
View File

@ -16,19 +16,11 @@
void samsung_keypad_cfg_gpio(unsigned int rows, unsigned int cols)
{
unsigned int gpio, end;
/* Set all the necessary GPH3 pins to special-function 3: KP_ROW[x] */
end = S5PV210_GPH3(rows);
for (gpio = S5PV210_GPH3(0); gpio < end; gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
}
s3c_gpio_cfgall_range(S5PV210_GPH3(0), rows,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE);
/* Set all the necessary GPH2 pins to special-function 3: KP_COL[x] */
end = S5PV210_GPH2(cols);
for (gpio = S5PV210_GPH2(0); gpio < end; gpio++) {
s3c_gpio_cfgpin(gpio, S3C_GPIO_SFN(3));
s3c_gpio_setpull(gpio, S3C_GPIO_PULL_NONE);
}
s3c_gpio_cfgall_range(S5PV210_GPH2(0), cols,
S3C_GPIO_SFN(3), S3C_GPIO_PULL_NONE);
}