drm/i915: Tidy up some error messages around reset failure
On blb and pnv, we are seeing sporadic i915 0000:00:02.0: Resetting chip after gpu hang [drm:intel_gpu_reset [i915]] rcs0: timed out on STOP_RING [drm:i915_reset [i915]] *ERROR* Failed hw init on reset -5 which notably lack the actual root cause of the error. Ostensibly it should be the init_ring_common() that failed, but it's error paths are covered by DRM_ERROR. Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk> Reviewed-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20180207111545.17078-1-chris@chris-wilson.co.uk
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@ -1957,7 +1957,8 @@ void i915_reset(struct drm_i915_private *i915, unsigned int flags)
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*/
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*/
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ret = i915_ggtt_enable_hw(i915);
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ret = i915_ggtt_enable_hw(i915);
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if (ret) {
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if (ret) {
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DRM_ERROR("Failed to re-enable GGTT following reset %d\n", ret);
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DRM_ERROR("Failed to re-enable GGTT following reset (%d)\n",
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ret);
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goto error;
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goto error;
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}
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}
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@ -1974,7 +1975,8 @@ void i915_reset(struct drm_i915_private *i915, unsigned int flags)
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*/
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*/
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ret = i915_gem_init_hw(i915);
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ret = i915_gem_init_hw(i915);
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if (ret) {
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if (ret) {
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DRM_ERROR("Failed hw init on reset %d\n", ret);
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DRM_ERROR("Failed to initialise HW following reset (%d)\n",
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ret);
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goto error;
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goto error;
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}
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}
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@ -5065,8 +5065,11 @@ static int __i915_gem_restart_engines(void *data)
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for_each_engine(engine, i915, id) {
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for_each_engine(engine, i915, id) {
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err = engine->init_hw(engine);
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err = engine->init_hw(engine);
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if (err)
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if (err) {
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DRM_ERROR("Failed to restart %s (%d)\n",
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engine->name, err);
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return err;
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return err;
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}
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}
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}
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return 0;
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return 0;
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@ -5118,14 +5121,16 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
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ret = i915_ppgtt_init_hw(dev_priv);
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ret = i915_ppgtt_init_hw(dev_priv);
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if (ret) {
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if (ret) {
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DRM_ERROR("PPGTT enable HW failed %d\n", ret);
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DRM_ERROR("Enabling PPGTT failed (%d)\n", ret);
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goto out;
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goto out;
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}
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}
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/* We can't enable contexts until all firmware is loaded */
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/* We can't enable contexts until all firmware is loaded */
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ret = intel_uc_init_hw(dev_priv);
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ret = intel_uc_init_hw(dev_priv);
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if (ret)
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if (ret) {
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DRM_ERROR("Enabling uc failed (%d)\n", ret);
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goto out;
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goto out;
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}
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intel_mocs_init_l3cc_table(dev_priv);
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intel_mocs_init_l3cc_table(dev_priv);
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@ -453,13 +453,13 @@ static int init_ring_common(struct intel_engine_cs *engine)
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if (!stop_ring(engine)) {
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if (!stop_ring(engine)) {
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/* G45 ring initialization often fails to reset head to zero */
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/* G45 ring initialization often fails to reset head to zero */
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DRM_DEBUG_KMS("%s head not reset to zero "
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DRM_DEBUG_DRIVER("%s head not reset to zero "
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"ctl %08x head %08x tail %08x start %08x\n",
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"ctl %08x head %08x tail %08x start %08x\n",
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engine->name,
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engine->name,
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I915_READ_CTL(engine),
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I915_READ_CTL(engine),
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I915_READ_HEAD(engine),
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I915_READ_HEAD(engine),
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I915_READ_TAIL(engine),
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I915_READ_TAIL(engine),
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I915_READ_START(engine));
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I915_READ_START(engine));
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if (!stop_ring(engine)) {
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if (!stop_ring(engine)) {
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DRM_ERROR("failed to set %s head to zero "
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DRM_ERROR("failed to set %s head to zero "
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@ -492,8 +492,8 @@ static int init_ring_common(struct intel_engine_cs *engine)
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/* WaClearRingBufHeadRegAtInit:ctg,elk */
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/* WaClearRingBufHeadRegAtInit:ctg,elk */
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if (I915_READ_HEAD(engine))
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if (I915_READ_HEAD(engine))
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DRM_DEBUG("%s initialization failed [head=%08x], fudging\n",
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DRM_DEBUG_DRIVER("%s initialization failed [head=%08x], fudging\n",
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engine->name, I915_READ_HEAD(engine));
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engine->name, I915_READ_HEAD(engine));
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intel_ring_update_space(ring);
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intel_ring_update_space(ring);
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I915_WRITE_HEAD(engine, ring->head);
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I915_WRITE_HEAD(engine, ring->head);
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