sh: Split out SH-4 __flush_xxx_region() ops.
This splits out the SH-4 __flush_xxx_region() functions and defines them as weak symbols. This allows us to provide optimized versions without having to ifdef cache-sh4.c to death. Signed-off-by: Paul Mundt <lethal@linux-sh.org>
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8174252752
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@ -8,7 +8,7 @@ ifndef CONFIG_CACHE_OFF
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cache-$(CONFIG_CPU_SH2) := cache-sh2.o
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cache-$(CONFIG_CPU_SH2) := cache-sh2.o
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cache-$(CONFIG_CPU_SH2A) := cache-sh2a.o
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cache-$(CONFIG_CPU_SH2A) := cache-sh2a.o
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cache-$(CONFIG_CPU_SH3) := cache-sh3.o
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cache-$(CONFIG_CPU_SH3) := cache-sh3.o
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cache-$(CONFIG_CPU_SH4) := cache-sh4.o
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cache-$(CONFIG_CPU_SH4) := cache-sh4.o flush-sh4.o
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cache-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
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cache-$(CONFIG_SH7705_CACHE_32KB) += cache-sh7705.o
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endif
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endif
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@ -118,66 +118,6 @@ void __init p3_cache_init(void)
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emit_cache_params();
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emit_cache_params();
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}
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}
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/*
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* Write back the dirty D-caches, but not invalidate them.
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*
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* START: Virtual Address (U0, P1, or P3)
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* SIZE: Size of the region.
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*/
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void __flush_wback_region(void *start, int size)
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{
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unsigned long v;
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unsigned long begin, end;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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asm volatile("ocbwb %0"
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: /* no output */
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: "m" (__m(v)));
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}
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}
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/*
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* Write back the dirty D-caches and invalidate them.
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*
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* START: Virtual Address (U0, P1, or P3)
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* SIZE: Size of the region.
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*/
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void __flush_purge_region(void *start, int size)
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{
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unsigned long v;
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unsigned long begin, end;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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asm volatile("ocbp %0"
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: /* no output */
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: "m" (__m(v)));
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}
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}
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/*
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* No write back please
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*/
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void __flush_invalidate_region(void *start, int size)
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{
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unsigned long v;
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unsigned long begin, end;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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asm volatile("ocbi %0"
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: /* no output */
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: "m" (__m(v)));
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}
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}
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/*
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/*
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* Write back the range of D-cache, and purge the I-cache.
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* Write back the range of D-cache, and purge the I-cache.
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*
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*
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@ -0,0 +1,63 @@
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#include <linux/mm.h>
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#include <asm/mmu_context.h>
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#include <asm/cacheflush.h>
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/*
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* Write back the dirty D-caches, but not invalidate them.
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*
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* START: Virtual Address (U0, P1, or P3)
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* SIZE: Size of the region.
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*/
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void __weak __flush_wback_region(void *start, int size)
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{
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unsigned long v;
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unsigned long begin, end;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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asm volatile("ocbwb %0"
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: /* no output */
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: "m" (__m(v)));
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}
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}
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/*
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* Write back the dirty D-caches and invalidate them.
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*
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* START: Virtual Address (U0, P1, or P3)
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* SIZE: Size of the region.
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*/
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void __weak __flush_purge_region(void *start, int size)
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{
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unsigned long v;
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unsigned long begin, end;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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asm volatile("ocbp %0"
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: /* no output */
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: "m" (__m(v)));
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}
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}
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/*
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* No write back please
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*/
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void __weak __flush_invalidate_region(void *start, int size)
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{
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unsigned long v;
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unsigned long begin, end;
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begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
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end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
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& ~(L1_CACHE_BYTES-1);
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for (v = begin; v < end; v+=L1_CACHE_BYTES) {
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asm volatile("ocbi %0"
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: /* no output */
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: "m" (__m(v)));
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}
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}
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