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clk: qcom: cpu-8996: move ACD logic to clk_cpu_8996_pmux_determine_rate 

Rather than telling everybody that we are using PLL as a parent (and
using ACD clock instead) properly select ACD as a pmux parent clock.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20220714100351.1834711-5-dmitry.baryshkov@linaro.org
This commit is contained in:
Dmitry Baryshkov 2022-07-14 13:03:49 +03:00 committed by Bjorn Andersson
parent f1e3fcc4fc
commit 81165aca05
1 changed files with 2 additions and 5 deletions
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7
drivers/clk/qcom/clk-cpu-8996.c
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@ -284,9 +284,6 @@ static int clk_cpu_8996_pmux_set_parent(struct clk_hw *hw, u8 index)
u32 val;
val = index;
/* We always want ACD when using the primary PLL */
if (val == PLL_INDEX)
val = ACD_INDEX;
val <<= cpuclk->shift;
return regmap_update_bits(clkr->regmap, cpuclk->reg, mask, val);
@ -371,7 +368,7 @@ static struct clk_cpu_8996_pmux pwrcl_pmux = {
.reg = PWRCL_REG_OFFSET + MUX_OFFSET,
.shift = 0,
.width = 2,
.pll = &pwrcl_pll.clkr.hw,
.pll = &pwrcl_pll_acd.clkr.hw,
.pll_div_2 = &pwrcl_smux.clkr.hw,
.nb.notifier_call = cpu_clk_notifier_cb,
.clkr.hw.init = &(struct clk_init_data) {
@ -388,7 +385,7 @@ static struct clk_cpu_8996_pmux perfcl_pmux = {
.reg = PERFCL_REG_OFFSET + MUX_OFFSET,
.shift = 0,
.width = 2,
.pll = &perfcl_pll.clkr.hw,
.pll = &perfcl_pll_acd.clkr.hw,
.pll_div_2 = &perfcl_smux.clkr.hw,
.nb.notifier_call = cpu_clk_notifier_cb,
.clkr.hw.init = &(struct clk_init_data) {