iwlwifi: pcie: move some cfg mangling from trans_pcie_alloc to probe
There were a couple of special handling to find the correct cfg inside iwl_trans_pcie_alloc(). Move them to iwl_pci_probe() so they're together with the rest of the decisions. Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
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91eff3f820
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809805a820
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@ -72,6 +72,7 @@
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#include "iwl-trans.h"
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#include "iwl-drv.h"
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#include "iwl-prph.h"
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#include "internal.h"
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#define IWL_PCI_DEVICE(dev, subdev, cfg) \
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@ -1017,29 +1018,70 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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else if (cfg == &iwl7265_n_cfg)
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cfg_7265d = &iwl7265d_n_cfg;
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if (cfg_7265d &&
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(iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D) {
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(iwl_trans->hw_rev & CSR_HW_REV_TYPE_MSK) == CSR_HW_REV_TYPE_7265D)
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cfg = cfg_7265d;
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iwl_trans->cfg = cfg_7265d;
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}
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if (iwl_trans->cfg->trans.rf_id && cfg == &iwl22000_2ac_cfg_hr_cdb &&
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iwl_trans->hw_rev != CSR_HW_REV_TYPE_HR_CDB) {
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u32 rf_id_chp = CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id);
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u32 jf_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF);
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u32 hr_chp_id = CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR);
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iwl_trans->hw_rf_id = iwl_read32(iwl_trans, CSR_HW_RF_ID);
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if (rf_id_chp == jf_chp_id) {
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if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
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cfg = &iwl9560_2ac_cfg_qnj_jf_b0;
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else
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cfg = &iwl22000_2ac_cfg_jf;
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} else if (rf_id_chp == hr_chp_id) {
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if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ)
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cfg = &iwl22000_2ax_cfg_qnj_hr_a0;
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else
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cfg = &iwl22000_2ac_cfg_hr;
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if (cfg == &iwlax210_2ax_cfg_so_hr_a0) {
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if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_TY) {
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cfg = &iwlax210_2ax_cfg_ty_gf_a0;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
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cfg = &iwlax210_2ax_cfg_so_jf_a0;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF)) {
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cfg = &iwlax211_2ax_cfg_so_gf_a0;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF4)) {
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cfg = &iwlax411_2ax_cfg_so_gf4_a0;
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}
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} else if (cfg == &iwl_ax101_cfg_qu_hr) {
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if ((CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
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iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0) ||
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(CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR1))) {
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cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR)) {
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cfg = &iwl_ax101_cfg_qu_hr;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
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cfg = &iwl22000_2ax_cfg_jf;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HRCDB)) {
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IWL_ERR(iwl_trans, "RF ID HRCDB is not supported\n");
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return -EINVAL;
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} else {
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IWL_ERR(iwl_trans, "Unrecognized RF ID 0x%08x\n",
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CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id));
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return -EINVAL;
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}
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(iwl_trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
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((cfg != &iwl_ax200_cfg_cc &&
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cfg != &killer1650x_2ax_cfg &&
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cfg != &killer1650w_2ax_cfg &&
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cfg != &iwl_ax201_cfg_quz_hr) ||
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iwl_trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0)) {
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u32 hw_status;
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hw_status = iwl_read_prph(iwl_trans, UMAG_GEN_HW_STATUS);
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if (CSR_HW_RF_STEP(iwl_trans->hw_rf_id) == SILICON_B_STEP)
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/*
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* b step fw is the same for physical card and fpga
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*/
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cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
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else if ((hw_status & UMAG_GEN_HW_IS_FPGA) &&
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CSR_HW_RF_STEP(iwl_trans->hw_rf_id) == SILICON_A_STEP) {
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cfg = &iwl22000_2ax_cfg_qnj_hr_a0_f0;
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} else {
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/*
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* a step no FPGA
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*/
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cfg = &iwl22000_2ac_cfg_hr;
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}
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iwl_trans->cfg = cfg;
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}
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/*
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@ -1049,22 +1091,18 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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* thing to do to support Qu C-step.
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*/
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if (iwl_trans->hw_rev == CSR_HW_REV_TYPE_QU_C0) {
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if (iwl_trans->cfg == &iwl_ax101_cfg_qu_hr)
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iwl_trans->cfg = &iwl_ax101_cfg_qu_c0_hr_b0;
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else if (iwl_trans->cfg == &iwl_ax201_cfg_qu_hr)
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iwl_trans->cfg = &iwl_ax201_cfg_qu_c0_hr_b0;
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else if (iwl_trans->cfg == &iwl9461_2ac_cfg_qu_b0_jf_b0)
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iwl_trans->cfg = &iwl9461_2ac_cfg_qu_c0_jf_b0;
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else if (iwl_trans->cfg == &iwl9462_2ac_cfg_qu_b0_jf_b0)
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iwl_trans->cfg = &iwl9462_2ac_cfg_qu_c0_jf_b0;
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else if (iwl_trans->cfg == &iwl9560_2ac_cfg_qu_b0_jf_b0)
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iwl_trans->cfg = &iwl9560_2ac_cfg_qu_c0_jf_b0;
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else if (iwl_trans->cfg == &iwl9560_2ac_160_cfg_qu_b0_jf_b0)
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iwl_trans->cfg = &iwl9560_2ac_160_cfg_qu_c0_jf_b0;
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else if (iwl_trans->cfg == &killer1650s_2ax_cfg_qu_b0_hr_b0)
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iwl_trans->cfg = &killer1650s_2ax_cfg_qu_c0_hr_b0;
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else if (iwl_trans->cfg == &killer1650i_2ax_cfg_qu_b0_hr_b0)
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iwl_trans->cfg = &killer1650i_2ax_cfg_qu_c0_hr_b0;
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if (cfg == &iwl_ax101_cfg_qu_hr)
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cfg = &iwl_ax101_cfg_qu_c0_hr_b0;
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else if (cfg == &iwl_ax201_cfg_qu_hr)
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cfg = &iwl_ax201_cfg_qu_c0_hr_b0;
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else if (cfg == &iwl9461_2ac_cfg_qu_b0_jf_b0)
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cfg = &iwl9461_2ac_cfg_qu_c0_jf_b0;
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else if (cfg == &iwl9462_2ac_cfg_qu_b0_jf_b0)
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cfg = &iwl9462_2ac_cfg_qu_c0_jf_b0;
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else if (cfg == &iwl9560_2ac_cfg_qu_b0_jf_b0)
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cfg = &iwl9560_2ac_cfg_qu_c0_jf_b0;
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else if (cfg == &iwl9560_2ac_160_cfg_qu_b0_jf_b0)
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cfg = &iwl9560_2ac_160_cfg_qu_c0_jf_b0;
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}
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/* same thing for QuZ... */
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@ -1084,6 +1122,8 @@ static int iwl_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
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}
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#endif
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/* now set the real cfg we decided to use */
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iwl_trans->cfg = cfg;
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pci_set_drvdata(pdev, iwl_trans);
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iwl_trans->drv = iwl_drv_start(iwl_trans);
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@ -3521,69 +3521,6 @@ struct iwl_trans *iwl_trans_pcie_alloc(struct pci_dev *pdev,
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IWL_DEBUG_INFO(trans, "HW REV: 0x%0x\n", trans->hw_rev);
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#if IS_ENABLED(CONFIG_IWLMVM)
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trans->hw_rf_id = iwl_read32(trans, CSR_HW_RF_ID);
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if (cfg == &iwlax210_2ax_cfg_so_hr_a0) {
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if (trans->hw_rev == CSR_HW_REV_TYPE_TY) {
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trans->cfg = &iwlax210_2ax_cfg_ty_gf_a0;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
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trans->cfg = &iwlax210_2ax_cfg_so_jf_a0;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF)) {
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trans->cfg = &iwlax211_2ax_cfg_so_gf_a0;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_GF4)) {
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trans->cfg = &iwlax411_2ax_cfg_so_gf4_a0;
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}
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} else if (cfg == &iwl_ax101_cfg_qu_hr) {
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if ((CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
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trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0) ||
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(CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR1))) {
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trans->cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR)) {
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trans->cfg = &iwl_ax101_cfg_qu_hr;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_JF)) {
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trans->cfg = &iwl22000_2ax_cfg_jf;
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HRCDB)) {
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IWL_ERR(trans, "RF ID HRCDB is not supported\n");
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ret = -EINVAL;
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goto out_no_pci;
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} else {
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IWL_ERR(trans, "Unrecognized RF ID 0x%08x\n",
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CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id));
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ret = -EINVAL;
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goto out_no_pci;
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}
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} else if (CSR_HW_RF_ID_TYPE_CHIP_ID(trans->hw_rf_id) ==
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CSR_HW_RF_ID_TYPE_CHIP_ID(CSR_HW_RF_ID_TYPE_HR) &&
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trans->hw_rev == CSR_HW_REV_TYPE_QNJ_B0) {
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u32 hw_status;
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hw_status = iwl_read_prph(trans, UMAG_GEN_HW_STATUS);
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if (CSR_HW_RF_STEP(trans->hw_rf_id) == SILICON_B_STEP)
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/*
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* b step fw is the same for physical card and fpga
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*/
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trans->cfg = &iwl22000_2ax_cfg_qnj_hr_b0;
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else if ((hw_status & UMAG_GEN_HW_IS_FPGA) &&
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CSR_HW_RF_STEP(trans->hw_rf_id) == SILICON_A_STEP) {
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trans->cfg = &iwl22000_2ax_cfg_qnj_hr_a0_f0;
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} else {
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/*
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* a step no FPGA
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*/
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trans->cfg = &iwl22000_2ac_cfg_hr;
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}
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}
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#endif
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iwl_pcie_set_interrupt_capa(pdev, trans);
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trans->hw_id = (pdev->device << 16) + pdev->subsystem_device;
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snprintf(trans->hw_id_str, sizeof(trans->hw_id_str),
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