staging: brcm80211: removed unused definitions from dhd_sdio.c
Signed-off-by: Roland Vossen <rvossen@broadcom.com> Reviewed-by: Arend van Spriel <arend@broadcom.com> Reviewed-by: Franky Lin <frankyl@broadcom.com> Signed-off-by: Arend van Spriel <arend@broadcom.com> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
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@ -65,11 +65,6 @@
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/* Trap types defined by ARM (see arminc.h) */
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/* Trap locations in lo memory */
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#define TRAP_STRIDE 4
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#define FIRST_TRAP TR_RST
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#define LAST_TRAP (TR_FIQ * TRAP_STRIDE)
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#if defined(__ARM_ARCH_4T__)
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#define MAX_TRAP_TYPE (TR_FIQ + 1)
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#elif defined(__ARM_ARCH_7M__)
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@ -114,8 +109,6 @@ struct brcmf_trap {
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#define CBUF_LEN (128)
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#define LOG_BUF_LEN 1024
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struct rte_log {
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u32 buf; /* Can't be pointer on (64-bit) hosts */
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uint buf_size;
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@ -166,10 +159,6 @@ struct rte_console {
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#include "dhd_dbg.h"
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#include <bcmchip.h>
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#ifndef DHDSDIO_MEM_DUMP_FNAME
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#define DHDSDIO_MEM_DUMP_FNAME "mem_dump"
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#endif
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#define TXQLEN 2048 /* bulk tx queue length */
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#define TXHI (TXQLEN - 256) /* turn on flow control above TXHI */
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#define TXLOW (TXHI - 256) /* turn off flow control below TXLOW */
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@ -344,7 +333,6 @@ struct rte_console {
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/* Value for ChipClockCSR during initial setup */
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#define DHD_INIT_CLKCTL1 (SBSDIO_FORCE_HW_CLKREQ_OFF | \
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SBSDIO_ALP_AVAIL_REQ)
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#define DHD_INIT_CLKCTL2 (SBSDIO_FORCE_HW_CLKREQ_OFF | SBSDIO_FORCE_ALP)
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/* Flags for SDH calls */
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#define F2SYNC (SDIO_REQ_4BYTE | SDIO_REQ_FIXED)
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@ -541,11 +529,7 @@ struct brcmf_bus {
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struct chip_info *ci; /* Chip info struct */
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char *vars; /* Variables (from CIS and/or other) */
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uint varsz; /* Size of variables buffer */
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u32 sbaddr; /* Current SB window pointer (-1, invalid) */
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uint sdpcmrev; /* SDIO core revision */
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uint armrev; /* CPU core revision */
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uint ramrev; /* SOCRAM core revision */
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u32 ramsize; /* Size of RAM in SOCRAM (bytes) */
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u32 orig_ramsize; /* Size of RAM in SOCRAM (bytes) */
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@ -612,8 +596,6 @@ struct brcmf_bus {
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bool sleeping; /* Is SDIO bus sleeping? */
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bool rxflow_mode; /* Rx flow control mode */
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bool rxflow; /* Is rx flow control on */
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uint prev_rxlim_hit; /* Is prev rx limit exceeded
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(per dpc schedule) */
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bool alp_only; /* Don't use HT clock (ALP only) */
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/* Field to decide if rx of control frames happen in rxbuf or lb-pool */
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bool usebufpool;
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@ -782,8 +764,6 @@ static bool retrydata;
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static const uint watermark = 8;
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static const uint firstread = BRCMF_FIRSTREAD;
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#define HDATLEN (firstread - (SDPCM_HDRLEN))
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/* Retry count for register access failures */
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static const uint retry_limit = 2;
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@ -5584,8 +5564,8 @@ brcmf_sdbrcm_probe_attach(struct brcmf_bus *bus, void *card, u32 regsva,
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/* Get info on the ARM and SOCRAM cores... */
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if (!DHD_NOPMU(bus)) {
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bus->armrev = SBCOREREV(brcmf_sdcard_reg_read(bus->card,
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CORE_SB(bus->ci->armcorebase, sbidhigh), 4));
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brcmf_sdcard_reg_read(bus->card,
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CORE_SB(bus->ci->armcorebase, sbidhigh), 4);
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bus->orig_ramsize = bus->ci->ramsize;
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if (!(bus->orig_ramsize)) {
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DHD_ERROR(("%s: failed to find SOCRAM memory!\n",
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@ -5680,7 +5660,6 @@ static bool brcmf_sdbrcm_probe_init(struct brcmf_bus *bus, void *card)
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bus->drvr->busstate = DHD_BUS_DOWN;
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bus->sleeping = false;
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bus->rxflow = false;
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bus->prev_rxlim_hit = 0;
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/* Done with backplane-dependent accesses, can drop clock... */
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brcmf_sdcard_cfg_write(card, SDIO_FUNC_1, SBSDIO_FUNC1_CHIPCLKCSR, 0,
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