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arm64: dts: ls1028a: delete extraneous #interrupt-cells for ENETC RCIE 

This specifier overrides the interrupt specifier with 3 cells from gic
(/interrupt-controller@6000000), but in fact ENETC is not an interrupt
controller, so the property is bogus.

Interrupts used by the children of the ENETC RCIE must use the full
3-cell specifier required by the GIC.

The issue has no functional consequence so there is no real reason to
port the patch to stable trees.

Fixes: 927d7f8575 ("arm64: dts: fsl: ls1028a: Add PCI IERC node and ENETC endpoints")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Tested-by: Michael Walle <michael@walle.cc>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
This commit is contained in:
Vladimir Oltean 2020-02-23 22:47:11 +02:00 committed by Shawn Guo
parent 80b06c5cae
commit 8023321d30
1 changed files with 0 additions and 1 deletions
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arch/arm64/boot/dts/freescale/fsl-ls1028a.dtsi
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@ -722,7 +722,6 @@
reg = <0x01 0xf0000000 0x0 0x100000>;
#address-cells = <3>;
#size-cells = <2>;
#interrupt-cells = <1>;
msi-parent = <&its>;
device_type = "pci";
bus-range = <0x0 0x0>;