arm64: move SEGMENT_ALIGN to <asm/memory.h>
Currently we define SEGMENT_ALIGN directly in our vmlinux.lds.S. This is unfortunate, as the EFI stub currently open-codes the same number, and in future we'll want to fiddle with this. This patch moves the definition to our <asm/memory.h>, where it can be used by both vmlinux.lds.S and the EFI stub code. Signed-off-by: Mark Rutland <mark.rutland@arm.com> Reviewed-by: Will Deacon <will.deacon@arm.com> Tested-by: Laura Abbott <labbott@redhat.com> Cc: Ard Biesheuvel <ard.biesheuvel@linaro.org> Cc: Catalin Marinas <catalin.marinas@arm.com> Cc: James Morse <james.morse@arm.com>
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@ -112,6 +112,25 @@
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#define IRQ_STACK_SIZE THREAD_SIZE
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/*
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* Alignment of kernel segments (e.g. .text, .data).
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*/
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#if defined(CONFIG_DEBUG_ALIGN_RODATA)
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/*
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* 4 KB granule: 1 level 2 entry
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* 16 KB granule: 128 level 3 entries, with contiguous bit
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* 64 KB granule: 32 level 3 entries, with contiguous bit
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*/
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#define SEGMENT_ALIGN SZ_2M
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#else
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/*
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* 4 KB granule: 16 level 3 entries, with contiguous bit
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* 16 KB granule: 4 level 3 entries, without contiguous bit
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* 64 KB granule: 1 level 3 entry
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*/
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#define SEGMENT_ALIGN SZ_64K
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#endif
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/*
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* Memory types available.
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*/
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@ -72,22 +72,6 @@ PECOFF_FILE_ALIGNMENT = 0x200;
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#define PECOFF_EDATA_PADDING
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#endif
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#if defined(CONFIG_DEBUG_ALIGN_RODATA)
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/*
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* 4 KB granule: 1 level 2 entry
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* 16 KB granule: 128 level 3 entries, with contiguous bit
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* 64 KB granule: 32 level 3 entries, with contiguous bit
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*/
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#define SEGMENT_ALIGN SZ_2M
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#else
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/*
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* 4 KB granule: 16 level 3 entries, with contiguous bit
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* 16 KB granule: 4 level 3 entries, without contiguous bit
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* 64 KB granule: 1 level 3 entry
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*/
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#define SEGMENT_ALIGN SZ_64K
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#endif
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SECTIONS
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{
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/*
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