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RDMA/hns: Adjust the order in which irq are requested and enabled 

It should first alloc workqueue and request irq, and finally enable irq.

Link: https://lore.kernel.org/r/1629985056-57004-6-git-send-email-liangwenpeng@huawei.com
Signed-off-by: Wenpeng Liang <liangwenpeng@huawei.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
This commit is contained in:
Wenpeng Liang 2021-08-26 21:37:34 +08:00 committed by Jason Gunthorpe
parent ab5cbb9d28
commit 7fac71691b
1 changed files with 16 additions and 19 deletions
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35
drivers/infiniband/hw/hns/hns_roce_hw_v2.c
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@ -6114,35 +6114,32 @@ static int hns_roce_v2_init_eq_table(struct hns_roce_dev *hr_dev)
ret = hns_roce_v2_create_eq(hr_dev, eq, eq_cmd);
if (ret) {
dev_err(dev, "eq create failed.\n");
dev_err(dev, "failed to create eq.\n");
goto err_create_eq_fail;
}
}
hr_dev->irq_workq = alloc_ordered_workqueue("hns_roce_irq_workq", 0);
if (!hr_dev->irq_workq) {
dev_err(dev, "failed to create irq workqueue.\n");
ret = -ENOMEM;
goto err_create_eq_fail;
}
ret = __hns_roce_request_irq(hr_dev, irq_num, comp_num, aeq_num,
other_num);
if (ret) {
dev_err(dev, "failed to request irq.\n");
goto err_request_irq_fail;
}
/* enable irq */
hns_roce_v2_int_mask_enable(hr_dev, eq_num, EQ_ENABLE);
ret = __hns_roce_request_irq(hr_dev, irq_num, comp_num,
aeq_num, other_num);
if (ret) {
dev_err(dev, "Request irq failed.\n");
goto err_request_irq_fail;
}
hr_dev->irq_workq = alloc_ordered_workqueue("hns_roce_irq_workq", 0);
if (!hr_dev->irq_workq) {
dev_err(dev, "Create irq workqueue failed!\n");
ret = -ENOMEM;
goto err_create_wq_fail;
}
return 0;
err_create_wq_fail:
__hns_roce_free_irq(hr_dev);
err_request_irq_fail:
hns_roce_v2_int_mask_enable(hr_dev, eq_num, EQ_DISABLE);
destroy_workqueue(hr_dev->irq_workq);
err_create_eq_fail:
for (i -= 1; i >= 0; i--)