soc: qcom: spm: Add 8916 SPM register data
Add SPM register information and initialization values for QCOM 8916 SoC. Link: https://lore.kernel.org/linux-arm-msm/1429314549-6730-5-git-send-email-lina.iyer@linaro.org/ Signed-off-by: Lina Iyer <lina.iyer@linaro.org> [stephan: rebase patch and fix conflicts] Signed-off-by: Stephan Gerhold <stephan@gerhold.net> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org> Link: https://lore.kernel.org/r/20211004204955.21077-11-stephan@gerhold.net
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@ -67,6 +67,25 @@ static const struct spm_reg_data spm_reg_8998_silver_l2 = {
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.avs_limit = 0x4200420,
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};
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static const u16 spm_reg_offset_v3_0[SPM_REG_NR] = {
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[SPM_REG_CFG] = 0x08,
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[SPM_REG_SPM_CTL] = 0x30,
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[SPM_REG_DLY] = 0x34,
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[SPM_REG_SEQ_ENTRY] = 0x400,
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};
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/* SPM register data for 8916 */
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static const struct spm_reg_data spm_reg_8916_cpu = {
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.reg_offset = spm_reg_offset_v3_0,
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.spm_cfg = 0x1,
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.spm_dly = 0x3C102800,
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.seq = { 0x60, 0x03, 0x60, 0x0B, 0x0F, 0x20, 0x10, 0x80, 0x30, 0x90,
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0x5B, 0x60, 0x03, 0x60, 0x3B, 0x76, 0x76, 0x0B, 0x94, 0x5B,
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0x80, 0x10, 0x26, 0x30, 0x0F },
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.start_index[PM_SLEEP_MODE_STBY] = 0,
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.start_index[PM_SLEEP_MODE_SPC] = 5,
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};
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static const u16 spm_reg_offset_v2_1[SPM_REG_NR] = {
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[SPM_REG_CFG] = 0x08,
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[SPM_REG_SPM_CTL] = 0x30,
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@ -176,6 +195,8 @@ static const struct of_device_id spm_match_table[] = {
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.data = &spm_reg_660_silver_l2 },
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{ .compatible = "qcom,msm8226-saw2-v2.1-cpu",
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.data = &spm_reg_8226_cpu },
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{ .compatible = "qcom,msm8916-saw2-v3.0-cpu",
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.data = &spm_reg_8916_cpu },
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{ .compatible = "qcom,msm8974-saw2-v2.1-cpu",
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.data = &spm_reg_8974_8084_cpu },
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{ .compatible = "qcom,msm8998-gold-saw2-v4.1-l2",
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