drm/amdgpu/navi10: Implement od clk printing
[Why] Before this patch, navi10 overdrive settings could not be printed via pp_od_clk_voltage [How] Implement printing for the overdrive settings for the following clocks in navi10's ppt print_clk_levels implementation: * SMU_OD_SCLK * SMU_OD_MCLK * SMU_OD_VDDC_CURVE Reviewed-by: Evan Quan <evan.quan@amd.com> Signed-off-by: Matt Coffin <mcoffin13@gmail.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -691,13 +691,25 @@ static bool navi10_is_support_fine_grained_dpm(struct smu_context *smu, enum smu
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return dpm_desc->SnapToDiscrete == 0 ? true : false;
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}
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static inline bool navi10_od_feature_is_supported(struct smu_11_0_overdrive_table *od_table, enum SMU_11_0_ODFEATURE_ID feature)
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{
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return od_table->cap[feature];
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}
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static int navi10_print_clk_levels(struct smu_context *smu,
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enum smu_clk_type clk_type, char *buf)
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{
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OverDriveTable_t *od_table;
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struct smu_11_0_overdrive_table *od_settings;
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uint16_t *curve_settings;
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int i, size = 0, ret = 0;
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uint32_t cur_value = 0, value = 0, count = 0;
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uint32_t freq_values[3] = {0};
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uint32_t mark_index = 0;
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struct smu_table_context *table_context = &smu->smu_table;
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od_table = (OverDriveTable_t *)table_context->overdrive_table;
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od_settings = smu->od_settings;
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switch (clk_type) {
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case SMU_GFXCLK:
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@ -748,6 +760,45 @@ static int navi10_print_clk_levels(struct smu_context *smu,
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}
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break;
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case SMU_OD_SCLK:
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if (!smu->od_enabled || !od_table || !od_settings)
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break;
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if (!navi10_od_feature_is_supported(od_settings, SMU_11_0_ODFEATURE_GFXCLK_LIMITS))
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break;
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size += sprintf(buf + size, "OD_SCLK:\n");
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size += sprintf(buf + size, "0: %uMhz\n1: %uMhz\n", od_table->GfxclkFmin, od_table->GfxclkFmax);
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break;
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case SMU_OD_MCLK:
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if (!smu->od_enabled || !od_table || !od_settings)
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break;
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if (!navi10_od_feature_is_supported(od_settings, SMU_11_0_ODFEATURE_UCLK_MAX))
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break;
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size += sprintf(buf + size, "OD_MCLK:\n");
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size += sprintf(buf + size, "0: %uMHz\n", od_table->UclkFmax);
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break;
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case SMU_OD_VDDC_CURVE:
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if (!smu->od_enabled || !od_table || !od_settings)
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break;
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if (!navi10_od_feature_is_supported(od_settings, SMU_11_0_ODFEATURE_GFXCLK_CURVE))
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break;
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size += sprintf(buf + size, "OD_VDDC_CURVE:\n");
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for (i = 0; i < 3; i++) {
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switch (i) {
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case 0:
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curve_settings = &od_table->GfxclkFreq1;
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break;
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case 1:
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curve_settings = &od_table->GfxclkFreq2;
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break;
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case 2:
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curve_settings = &od_table->GfxclkFreq3;
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break;
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default:
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break;
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}
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size += sprintf(buf + size, "%d: %uMHz @ %umV\n", i, curve_settings[0], curve_settings[1] / NAVI10_VOLTAGE_SCALE);
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}
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break;
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default:
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break;
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}
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@ -1661,11 +1712,6 @@ static inline void navi10_dump_od_table(OverDriveTable_t *od_table) {
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pr_debug("OD: OverDrivePct: %d\n", od_table->OverDrivePct);
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}
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static inline bool navi10_od_feature_is_supported(struct smu_11_0_overdrive_table *od_table, enum SMU_11_0_ODFEATURE_ID feature)
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{
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return od_table->cap[feature];
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}
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static int navi10_od_setting_check_range(struct smu_11_0_overdrive_table *od_table, enum SMU_11_0_ODSETTING_ID setting, uint32_t value)
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{
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if (value < od_table->min[setting]) {
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