soc: renesas: rcar-sysc: Add r8a774a1 support
Add support for RZ/G2M (R8A774A1) SoC power areas to the R-Car SYSC driver. Signed-off-by: Biju Das <biju.das@bp.renesas.com> Reviewed-by: Chris Paterson <chris.paterson2@renesas.com> Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -10,6 +10,7 @@ Required properties:
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- "renesas,r8a7743-sysc" (RZ/G1M)
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- "renesas,r8a7745-sysc" (RZ/G1E)
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- "renesas,r8a77470-sysc" (RZ/G1C)
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- "renesas,r8a774a1-sysc" (RZ/G2M)
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- "renesas,r8a7779-sysc" (R-Car H1)
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- "renesas,r8a7790-sysc" (R-Car H2)
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- "renesas,r8a7791-sysc" (R-Car M2-W)
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@ -9,6 +9,7 @@ config SOC_RENESAS
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select SYSC_R8A7743 if ARCH_R8A7743
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select SYSC_R8A7745 if ARCH_R8A7745
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select SYSC_R8A77470 if ARCH_R8A77470
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select SYSC_R8A774A1 if ARCH_R8A774A1
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select SYSC_R8A7779 if ARCH_R8A7779
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select SYSC_R8A7790 if ARCH_R8A7790
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select SYSC_R8A7791 if ARCH_R8A7791 || ARCH_R8A7793
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@ -37,6 +38,10 @@ config SYSC_R8A77470
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bool "RZ/G1C System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A774A1
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bool "RZ/G2M System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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config SYSC_R8A7779
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bool "R-Car H1 System Controller support" if COMPILE_TEST
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select SYSC_RCAR
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@ -6,6 +6,7 @@ obj-$(CONFIG_SOC_RENESAS) += renesas-soc.o
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obj-$(CONFIG_SYSC_R8A7743) += r8a7743-sysc.o
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obj-$(CONFIG_SYSC_R8A7745) += r8a7745-sysc.o
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obj-$(CONFIG_SYSC_R8A77470) += r8a77470-sysc.o
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obj-$(CONFIG_SYSC_R8A774A1) += r8a774a1-sysc.o
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obj-$(CONFIG_SYSC_R8A7779) += r8a7779-sysc.o
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obj-$(CONFIG_SYSC_R8A7790) += r8a7790-sysc.o
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obj-$(CONFIG_SYSC_R8A7791) += r8a7791-sysc.o
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@ -0,0 +1,45 @@
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// SPDX-License-Identifier: GPL-2.0
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/*
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* Renesas RZ/G2M System Controller
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* Copyright (C) 2018 Renesas Electronics Corp.
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*
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* Based on Renesas R-Car M3-W System Controller
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* Copyright (C) 2016 Glider bvba
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*/
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#include <linux/bug.h>
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#include <linux/kernel.h>
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#include <dt-bindings/power/r8a774a1-sysc.h>
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#include "rcar-sysc.h"
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static const struct rcar_sysc_area r8a774a1_areas[] __initconst = {
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{ "always-on", 0, 0, R8A774A1_PD_ALWAYS_ON, -1, PD_ALWAYS_ON },
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{ "ca57-scu", 0x1c0, 0, R8A774A1_PD_CA57_SCU, R8A774A1_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca57-cpu0", 0x80, 0, R8A774A1_PD_CA57_CPU0, R8A774A1_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "ca57-cpu1", 0x80, 1, R8A774A1_PD_CA57_CPU1, R8A774A1_PD_CA57_SCU,
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PD_CPU_NOCR },
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{ "ca53-scu", 0x140, 0, R8A774A1_PD_CA53_SCU, R8A774A1_PD_ALWAYS_ON,
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PD_SCU },
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{ "ca53-cpu0", 0x200, 0, R8A774A1_PD_CA53_CPU0, R8A774A1_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu1", 0x200, 1, R8A774A1_PD_CA53_CPU1, R8A774A1_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu2", 0x200, 2, R8A774A1_PD_CA53_CPU2, R8A774A1_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "ca53-cpu3", 0x200, 3, R8A774A1_PD_CA53_CPU3, R8A774A1_PD_CA53_SCU,
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PD_CPU_NOCR },
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{ "a3vc", 0x380, 0, R8A774A1_PD_A3VC, R8A774A1_PD_ALWAYS_ON },
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{ "a2vc0", 0x3c0, 0, R8A774A1_PD_A2VC0, R8A774A1_PD_A3VC },
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{ "a2vc1", 0x3c0, 1, R8A774A1_PD_A2VC1, R8A774A1_PD_A3VC },
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{ "3dg-a", 0x100, 0, R8A774A1_PD_3DG_A, R8A774A1_PD_ALWAYS_ON },
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{ "3dg-b", 0x100, 1, R8A774A1_PD_3DG_B, R8A774A1_PD_3DG_A },
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};
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const struct rcar_sysc_info r8a774a1_sysc_info __initconst = {
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.areas = r8a774a1_areas,
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.num_areas = ARRAY_SIZE(r8a774a1_areas),
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};
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@ -275,6 +275,9 @@ static const struct of_device_id rcar_sysc_matches[] __initconst = {
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#ifdef CONFIG_SYSC_R8A77470
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{ .compatible = "renesas,r8a77470-sysc", .data = &r8a77470_sysc_info },
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#endif
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#ifdef CONFIG_SYSC_R8A774A1
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{ .compatible = "renesas,r8a774a1-sysc", .data = &r8a774a1_sysc_info },
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#endif
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#ifdef CONFIG_SYSC_R8A7779
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{ .compatible = "renesas,r8a7779-sysc", .data = &r8a7779_sysc_info },
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#endif
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@ -52,6 +52,7 @@ struct rcar_sysc_info {
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extern const struct rcar_sysc_info r8a7743_sysc_info;
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extern const struct rcar_sysc_info r8a7745_sysc_info;
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extern const struct rcar_sysc_info r8a77470_sysc_info;
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extern const struct rcar_sysc_info r8a774a1_sysc_info;
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extern const struct rcar_sysc_info r8a7779_sysc_info;
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extern const struct rcar_sysc_info r8a7790_sysc_info;
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extern const struct rcar_sysc_info r8a7791_sysc_info;
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